From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon-CC+yJ3UmIYqDUpFQwHEjaQ@public.gmane.org Subject: [Bug 91236] New: [NVC3] Passive DP to HDMI adapter cannot use pixel clocks greater than 165 MHz Date: Mon, 06 Jul 2015 06:09:34 +0000 Message-ID: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1453839459==" Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: nouveau-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Nouveau" To: nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org List-Id: nouveau.vger.kernel.org --===============1453839459== Content-Type: multipart/alternative; boundary="1436162975.Af4FaDB1.15346"; charset="UTF-8" --1436162975.Af4FaDB1.15346 Date: Mon, 6 Jul 2015 06:09:34 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" https://bugs.freedesktop.org/show_bug.cgi?id=91236 Bug ID: 91236 Summary: [NVC3] Passive DP to HDMI adapter cannot use pixel clocks greater than 165 MHz Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Reporter: a.boettcher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org QA Contact: xorg-team-go0+a7rfsptAfugRpC6u6w@public.gmane.org Created attachment 116968 --> https://bugs.freedesktop.org/attachment.cgi?id=116968&action=edit dmesg of full boot + setting external display to mode with 297 MHz clock Starting from stock linux 4.1.0 source, libdrm 2.4.61, xf86-video-nouveau-1.0.11, xorg-server 1.17.1. The hardware is a Quatro 2000M in a Lenovo W520 laptop setup as an offload sink and output source for an integrated intel display. The external display is a Seiki SE39UY04 connected by HDMI to display port passive adapter. We attempted to use a 3840x2160@30 mode which has a pixel clock of 297 MHz. This is known to work fine in both the nvidia blob and the windows driver, so the hardware has no issues driving this clock in a single TDMS link. First the connector detection code will reject this mode from the default list because the maximum TDMS speed is based on pre-HDMI 1.3 spec. Second even if that is worked around the mode is higher than 165 MHz, so the display port connection will enter dual link mode, which must be stopped in this case. We attempted to allow the mode to pass through to see if it might just work. There were two changes: drivers/gpu/drm/nouveau/nouvau_connector.c modified get_tmds_link_bandwidth() to return 340000 (HDMI 1.3 spec) drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c commented out line 1547-1548 to not use dual link mode. The result is a failure. The screen flickers and does not show anything. A full dmesg log with nouveau.debug=trace is attached. I am a C programmer but I have no familiarity with any part of the nouveau or DRM parts of the world. Very willing to help, just don't know where to proceed. -- You are receiving this mail because: You are the assignee for the bug. --1436162975.Af4FaDB1.15346 Date: Mon, 6 Jul 2015 06:09:35 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8"
Bug ID 91236
Summary [NVC3] Passive DP to HDMI adapter cannot use pixel clocks greater than 165 MHz
Product xorg
Version unspecified
Hardware x86-64 (AMD64)
OS Linux (All)
Status NEW
Severity normal
Priority medium
Component Driver/nouveau
Assignee nouveau@lists.freedesktop.org
Reporter a.boettcher@gmail.com
QA Contact xorg-team@lists.x.org 

Created attachment 116968 [details]
dmesg of full boot + setting external display to mode with 297 MHz clock

Starting from stock linux 4.1.0 source, libdrm 2.4.61,
xf86-video-nouveau-1.0.11, xorg-server 1.17.1. The hardware is a Quatro 2000M
in a Lenovo W520 laptop setup as an offload sink and output source for an
integrated intel display. The external display is a Seiki SE39UY04 connected by
HDMI to display port passive adapter.

We attempted to use a 3840x2160@30 mode which has a pixel clock of 297 MHz.
This is known to work fine in both the nvidia blob and the windows driver, so
the hardware has no issues driving this clock in a single TDMS link.

First the connector detection code will reject this mode from the default list
because the maximum TDMS speed is based on pre-HDMI 1.3 spec. Second even if
that is worked around the mode is higher than 165 MHz, so the display port
connection will enter dual link mode, which must be stopped in this case.

We attempted to allow the mode to pass through to see if it might just work.
There were two changes:

drivers/gpu/drm/nouveau/nouvau_connector.c modified get_tmds_link_bandwidth()
to return 340000 (HDMI 1.3 spec)

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c commented out line 1547-1548 to
not use dual link mode.

The result is a failure. The screen flickers and does not show anything. A full
dmesg log with nouveau.debug=trace is attached.

I am a C programmer but I have no familiarity with any part of the nouveau or
DRM parts of the world. Very willing to help, just don't know where to proceed.

You are receiving this mail because:
  • You are the assignee for the bug.
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