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From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
	agross@kernel.org, bjorn.andersson@linaro.org,
	lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org,
	plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz,
	tiwai@suse.com, rohitkr@codeaurora.org,
	linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	swboyd@chromium.org, judyhsiao@chromium.org,
	Linus Walleij <linus.walleij@linaro.org>,
	linux-gpio@vger.kernel.org
Cc: Venkata Prasad Potturu <potturu@codeaurora.org>
Subject: Re: [PATCH v3 3/5] pinctrl: qcom: Move chip specific functions to right files
Date: Wed, 1 Dec 2021 20:41:14 +0530	[thread overview]
Message-ID: <c05aee0c-9cd7-38e0-61cf-eaf138185b00@codeaurora.org> (raw)
In-Reply-To: <a9e561cc-67f7-450b-fc08-61ece48e9070@linaro.org>


On 12/1/2021 8:37 PM, Srinivas Kandagatla wrote:
Thanks for clarification Srini!!
>
> On 01/12/2021 14:33, Srinivasa Rao Mandadapu wrote:
>>>
>>>
>>>> +enum lpass_lpi_functions {
>>>> +    LPI_MUX_dmic1_clk,
>>>> +    LPI_MUX_dmic1_data,
>>>> +    LPI_MUX_dmic2_clk,
>>>> +    LPI_MUX_dmic2_data,
>>>> +    LPI_MUX_dmic3_clk,
>>>> +    LPI_MUX_dmic3_data,
>>>> +    LPI_MUX_i2s1_clk,
>>>> +    LPI_MUX_i2s1_data,
>>>> +    LPI_MUX_i2s1_ws,
>>>> +    LPI_MUX_i2s2_clk,
>>>> +    LPI_MUX_i2s2_data,
>>>> +    LPI_MUX_i2s2_ws,
>>>> +    LPI_MUX_qua_mi2s_data,
>>>> +    LPI_MUX_qua_mi2s_sclk,
>>>> +    LPI_MUX_qua_mi2s_ws,
>>>> +    LPI_MUX_swr_rx_clk,
>>>> +    LPI_MUX_swr_rx_data,
>>>> +    LPI_MUX_swr_tx_clk,
>>>> +    LPI_MUX_swr_tx_data,
>>>> +    LPI_MUX_wsa_swr_clk,
>>>> +    LPI_MUX_wsa_swr_data,
>>>> +    LPI_MUX_gpio,
>>>> +    LPI_MUX__,
>>>> +};
>>>> +
>>>> +static const unsigned int gpio0_pins[] = { 0 };
>>>> +static const unsigned int gpio1_pins[] = { 1 };
>>>> +static const unsigned int gpio2_pins[] = { 2 };
>>>> +static const unsigned int gpio3_pins[] = { 3 };
>>>> +static const unsigned int gpio4_pins[] = { 4 };
>>>> +static const unsigned int gpio5_pins[] = { 5 };
>>>> +static const unsigned int gpio6_pins[] = { 6 };
>>>> +static const unsigned int gpio7_pins[] = { 7 };
>>>> +static const unsigned int gpio8_pins[] = { 8 };
>>>> +static const unsigned int gpio9_pins[] = { 9 };
>>>> +static const unsigned int gpio10_pins[] = { 10 };
>>>> +static const unsigned int gpio11_pins[] = { 11 };
>>>> +static const unsigned int gpio12_pins[] = { 12 };
>>>> +static const unsigned int gpio13_pins[] = { 13 };
>>> >>>
>>> to here are specific to sm8250, so it should not be in header file 
>>> to start with.
>>
>> As these are common to all lpass variants.. I feel it's better to 
>> keep in Header file.
>
> You realize that every include of this file will add these static 
> variables to file, in this case to pinctrl-lpass-lpi.c, 
> pinctrl-sm8250-lpass-lpi.c and pinctrl-sc7280-lpass-lpi.c
> so in first file(pinctrl-lpass-lpi.c) you never use those variables in 
> second file (pinctrl-sm8250-lpass-lpi.c)you only use up to gpio13 and 
> in third file pinctrl-sc7280-lpass-lpi.c you could use them.
>
> so its really bad idea to add static variables in header files.
>
Okay. Understood. will move it SoC specific files.
> --srini
>
>>
>> And if new pins comes in later variants, we can add them 
>> incrementally, and they will not impact existing pin numbers.
>>
>> I think in upcoming variants number of pins will not decrease.
>>
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.


  reply	other threads:[~2021-12-01 15:12 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-29  9:58 [PATCH v3 0/5] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu
2021-11-29  9:58 ` [PATCH v3 1/5] dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific Srinivasa Rao Mandadapu
2021-11-29  9:58   ` Srinivasa Rao Mandadapu
2021-11-29 15:30   ` Rob Herring
2021-11-29 15:30     ` Rob Herring
2021-11-30 17:12   ` Srinivas Kandagatla
2021-11-29  9:58 ` [PATCH v3 2/5] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings Srinivasa Rao Mandadapu
2021-11-29  9:58   ` Srinivasa Rao Mandadapu
2021-11-29 15:30   ` Rob Herring
2021-11-29 15:30     ` Rob Herring
2021-11-29  9:58 ` [PATCH v3 3/5] pinctrl: qcom: Move chip specific functions to right files Srinivasa Rao Mandadapu
2021-11-29  9:58   ` Srinivasa Rao Mandadapu
2021-11-30 10:38   ` kernel test robot
2021-11-30 18:38   ` kernel test robot
2021-12-01 10:41   ` Srinivas Kandagatla
2021-12-01 14:33     ` Srinivasa Rao Mandadapu
2021-12-01 15:07       ` Srinivas Kandagatla
2021-12-01 15:11         ` Srinivasa Rao Mandadapu [this message]
2021-11-29  9:58 ` [PATCH v3 4/5] pinctrl: qcom: Update clock voting as optional Srinivasa Rao Mandadapu
2021-11-29  9:58   ` Srinivasa Rao Mandadapu
2021-11-29  9:58 ` [PATCH v3 5/5] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu
2021-11-29  9:58   ` Srinivasa Rao Mandadapu

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