diff for duplicates of <c1440608060e4b2fabf07ff5ac0a7fe49201ba9d.camel@mediatek.com> diff --git a/a/content_digest b/N1/content_digest index f238ea3..a7710e3 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -10,22 +10,21 @@ chunkuang.hu@kernel.org <chunkuang.hu@kernel.org> AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> " krzk@kernel.org <krzk@kernel.org>\0" - "Cc\0Sunny Shen (\346\262\210\345\247\215\345\247\215) <Sunny.Shen@mediatek.com>" - " Sirius Wang (\347\216\213\347\232\223\346\230\261) <Sirius.Wang@mediatek.com>" - " Nancy Lin (\346\236\227\346\254\243\350\236\242) <Nancy.Lin@mediatek.com>" + "Cc\0devicetree@vger.kernel.org <devicetree@vger.kernel.org>" " Xiandong Wang (\347\216\213\345\205\210\345\206\254) <Xiandong.Wang@mediatek.com>" + " Jason-JH Lin (\346\236\227\347\235\277\347\245\245) <Jason-JH.Lin@mediatek.com>" + " Singo Chang (\345\274\265\350\210\210\345\234\213) <Singo.Chang@mediatek.com>" linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> dri-devel@lists.freedesktop.org <dri-devel@lists.freedesktop.org> Project_Global_Chrome_Upstream_Group <Project_Global_Chrome_Upstream_Group@mediatek.com> + treapking@chromium.org <treapking@chromium.org> + " Nancy Lin (\346\236\227\346\254\243\350\236\242) <Nancy.Lin@mediatek.com>" linux-mediatek@lists.infradead.org <linux-mediatek@lists.infradead.org> - " Jason-JH Lin (\346\236\227\347\235\277\347\245\245) <Jason-JH.Lin@mediatek.com>" - devicetree@vger.kernel.org <devicetree@vger.kernel.org> - fshao@chromium.org <fshao@chromium.org> + " Sunny Shen (\346\262\210\345\247\215\345\247\215) <Sunny.Shen@mediatek.com>" p.zabel@pengutronix.de <p.zabel@pengutronix.de> - " Singo Chang (\345\274\265\350\210\210\345\234\213) <Singo.Chang@mediatek.com>" - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + " Sirius Wang (\347\216\213\347\232\223\346\230\261) <Sirius.Wang@mediatek.com>" matthias.bgg@gmail.com <matthias.bgg@gmail.com> - " treapking@chromium.org <treapking@chromium.org>\0" + " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" "\00:1\0" "b\0" "On Fri, 2025-01-10 at 14:01 +0100, Krzysztof Kozlowski wrote:\n" @@ -165,4 +164,4 @@ "> > \n" > > Best, Paul -40a021f2a1013f378ecd4401dcf11f43623c898bea07b38db017455eda13ff0e +e74ca7ca1b038d3868c6123ee3955ba7f16a0db714250c884680c110b8aa69fa
diff --git a/N2/2.bin b/N2/2.bin new file mode 100644 index 0000000..6966ec6 --- /dev/null +++ b/N2/2.bin @@ -0,0 +1,154 @@ +<html><body><p> +<pre> +On Fri, 2025-01-10 at 14:01 +0100, Krzysztof Kozlowski wrote: +>  +> External email : Please do not click links or open attachments until +> you have verified the sender or the content. +>  +>  +> On 10/01/2025 13:33, paul-pl.chen wrote: +> > From: "Paul-pl.Chen" <paul-pl.chen@mediatek.com> +> >  +> > Add mediatek,exdma.yaml to support EXDMA for MT8196. +> >  +> > Signed-off-by: Paul-pl.Chen <paul-pl.chen@mediatek.com> +> > --- +> > The header used in examples: +> > #include <dt-bindings/clock/mt8196-clk.h> +> > #include <dt-bindings/power/mt8196-power.h> +> > are not upstreamed yet. +>  +> Which makes this untestable and unmergeable. +>  +> This cannot be accepted. Fix your dependencies or decouple from them. +>  +> > It will be sent by related owner soon. +>  +> Still this won't build and won't be possible to apply. +>  +> > --- +> >  .../display/mediatek/mediatek,exdma.yaml      | 77 +> > +++++++++++++++++++ +> >  1 file changed, 77 insertions(+) +> >  create mode 100644 +> > Documentation/devicetree/bindings/display/mediatek/mediatek,exdma.y +> > aml +> >  +> > diff --git +> > a/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma +> > .yaml +> > b/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma +> > .yaml +> > new file mode 100644 +> > index 000000000000..385f5549dfaa +> > --- /dev/null +> > +++ +> > b/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma +> > .yaml +>  +> Filename matching compatible. +>  +> Why is this in display? DMA goes to dma. + +Hi Krzysztof , + +Regarding the issue of the EXDMA driver, we have conducted an internal +survey of drivers under the DMA subsystem. We found that EXDMA operates +differently from typical DMA drivers, and therefore we believe that the +EXDMA driver may not be suitable to be placed under the +driver/mediatek/drm directory. The main reasons are as follows: + +(1)No Memory Allocation within EXDMA Engine: +The EXDMA engine does not perform memory allocation operations itself. +Instead, it relies on GEM (Graphics Execution Manager) to allocate +memory.Traditional DMA drivers often handle their own memory +allocations, but in the case of EXDMA, memory management is delegated +to GEM. + +(2)Primary Task of EXDMA: +The main function of EXDMA is to transfer buffers allocated by GEM to +the subsequent display pipeline. +EXDMA serves as a bridge between memory allocated by GEM and the +display components, rather than acting as a general-purpose DMA engine. +Based on the points above, we have decided to place the EXDMA driver +under the DRM display subsystem rather than under the DMA subsystem. + +>  +> > @@ -0,0 +1,77 @@ +> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +> > +%YAML 1.2 +> > +--- +> > +$id: +> > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,exdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!ldlqohpAoMyTt24UKnssKOk5Qvmc_wlvQPCdjneKDCeshDPwI5Uuuy4A2sI2RlfYLIFDKZx_-GGDOlX48Q$ +> > +$schema: +> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!ldlqohpAoMyTt24UKnssKOk5Qvmc_wlvQPCdjneKDCeshDPwI5Uuuy4A2sI2RlfYLIFDKZx_-GHpxO9DFQ$ +> > + +> > +title: MediaTek EXDMA +> > + +> > +maintainers: +> > +  - Chun-Kuang Hu <chunkuang.hu@kernel.org> +> > +  - Philipp Zabel <p.zabel@pengutronix.de> +> > + +> > +description: +> > +  The MediaTek display overlap extended DMA engine, namely +> > OVL_EXDMA or EXDMA, +> > +  primarily functions as a DMA engine for reading data from DRAM +> > with various +> > +  DRAM footprints and data formats. For input sources in certain +> > color formats +> > +  and color domains, OVL_EXDMA also includes a color transfer +> > function +> > +  to process pixels into a consistent color domain. +> > + +>  +> Missing ref to dma schemas. + +allOf: +- $ref: dma-controller.yaml# +>  +> > +properties: +> > +  compatible: +> > +    const: mediatek,mt8196-exdma +> > + +> > +  reg: +> > +    maxItems: 1 +> > + +> > +  clocks: +> > +    items: +> > +      - description: EXDMA Clock +> > + +> > +  power-domains: +> > +    maxItems: 1 +> > + +> > +  mediatek,larb: +> > +    $ref: /schemas/types.yaml#/definitions/phandle-array +>  +> Why array? And isn't the property named mediatek,larbs? +>  +Using "mediatek,larb" here is correct because the EXDMA hardware IP +will only have one mediatek,larb. In the next version, we will change +the phandle-array definition to a single phandle. +Please refer to this link: +https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/Documentation/devicetree/bindings?id=6d0990e6e844cfa045b1a7348f58964caceb4de4 +Since MT8196 use SMMU, the SMMU can no longer internally determine the +connection relationship between smi-larb and the consumer's +pm_runtime_get(_sync). Therefore, we need to add this information back. +> >  +> >  +> > Best, Paul  + + +</pre> +</p></body></html><!--type:text--><!--{--><pre>************* MEDIATEK Confidentiality Notice ******************** +The information contained in this e-mail message (including any +attachments) may be confidential, proprietary, privileged, or otherwise +exempt from disclosure under applicable laws. It is intended to be +conveyed only to the designated recipient(s). Any use, dissemination, +distribution, printing, retaining or copying of this e-mail (including its +attachments) by unintended recipient(s) is strictly prohibited and may +be unlawful. If you are not an intended recipient of this e-mail, or believe +that you have received this e-mail in error, please notify the sender +immediately (by replying to this e-mail), delete any and all copies of +this e-mail (including any attachments) from your system, and do not +disclose the content of this e-mail to any other person. Thank you! +</pre><!--}--> diff --git a/N2/2.hdr b/N2/2.hdr new file mode 100644 index 0000000..da1f671 --- /dev/null +++ b/N2/2.hdr @@ -0,0 +1,3 @@ +Content-Type: text/html; + charset="utf-8" +Content-Transfer-Encoding: base64 diff --git a/a/content_digest b/N2/content_digest index f238ea3..b0a99cd 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -26,7 +26,7 @@ linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> matthias.bgg@gmail.com <matthias.bgg@gmail.com> " treapking@chromium.org <treapking@chromium.org>\0" - "\00:1\0" + "\01:1\0" "b\0" "On Fri, 2025-01-10 at 14:01 +0100, Krzysztof Kozlowski wrote:\n" "> \n" @@ -164,5 +164,161 @@ "> > \n" "> > \n" > > Best, Paul + "\01:2\0" + "b\0" + "<html><body><p>\r\n" + "<pre>\r\n" + "On Fri, 2025-01-10 at 14:01 +0100, Krzysztof Kozlowski wrote:\r\n" + "> \r\n" + "> External email : Please do not click links or open attachments until\r\n" + "> you have verified the sender or the content.\r\n" + "> \r\n" + "> \r\n" + "> On 10/01/2025 13:33, paul-pl.chen wrote:\r\n" + "> > From: "Paul-pl.Chen" <paul-pl.chen@mediatek.com>\r\n" + "> > \r\n" + "> > Add mediatek,exdma.yaml to support EXDMA for MT8196.\r\n" + "> > \r\n" + "> > Signed-off-by: Paul-pl.Chen <paul-pl.chen@mediatek.com>\r\n" + "> > ---\r\n" + "> > The header used in examples:\r\n" + "> > #include <dt-bindings/clock/mt8196-clk.h>\r\n" + "> > #include <dt-bindings/power/mt8196-power.h>\r\n" + "> > are not upstreamed yet.\r\n" + "> \r\n" + "> Which makes this untestable and unmergeable.\r\n" + "> \r\n" + "> This cannot be accepted. Fix your dependencies or decouple from them.\r\n" + "> \r\n" + "> > It will be sent by related owner soon.\r\n" + "> \r\n" + "> Still this won't build and won't be possible to apply.\r\n" + "> \r\n" + "> > ---\r\n" + "> >  .../display/mediatek/mediatek,exdma.yaml      | 77\r\n" + "> > +++++++++++++++++++\r\n" + "> >  1 file changed, 77 insertions(+)\r\n" + "> >  create mode 100644\r\n" + "> > Documentation/devicetree/bindings/display/mediatek/mediatek,exdma.y\r\n" + "> > aml\r\n" + "> > \r\n" + "> > diff --git\r\n" + "> > a/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma\r\n" + "> > .yaml\r\n" + "> > b/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma\r\n" + "> > .yaml\r\n" + "> > new file mode 100644\r\n" + "> > index 000000000000..385f5549dfaa\r\n" + "> > --- /dev/null\r\n" + "> > +++\r\n" + "> > b/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma\r\n" + "> > .yaml\r\n" + "> \r\n" + "> Filename matching compatible.\r\n" + "> \r\n" + "> Why is this in display? DMA goes to dma.\r\n" + "\r\n" + "Hi Krzysztof ,\r\n" + "\r\n" + "Regarding the issue of the EXDMA driver, we have conducted an internal\r\n" + "survey of drivers under the DMA subsystem. We found that EXDMA operates\r\n" + "differently from typical DMA drivers, and therefore we believe that the\r\n" + "EXDMA driver may not be suitable to be placed under the\r\n" + "driver/mediatek/drm directory. The main reasons are as follows:\r\n" + "\r\n" + "(1)No Memory Allocation within EXDMA Engine:\r\n" + "The EXDMA engine does not perform memory allocation operations itself.\r\n" + "Instead, it relies on GEM (Graphics Execution Manager) to allocate\r\n" + "memory.Traditional DMA drivers often handle their own memory\r\n" + "allocations, but in the case of EXDMA, memory management is delegated\r\n" + "to GEM.\r\n" + "\r\n" + "(2)Primary Task of EXDMA:\r\n" + "The main function of EXDMA is to transfer buffers allocated by GEM to\r\n" + "the subsequent display pipeline.\r\n" + "EXDMA serves as a bridge between memory allocated by GEM and the\r\n" + "display components, rather than acting as a general-purpose DMA engine.\r\n" + "Based on the points above, we have decided to place the EXDMA driver\r\n" + "under the DRM display subsystem rather than under the DMA subsystem.\r\n" + "\r\n" + "> \r\n" + "> > @@ -0,0 +1,77 @@\r\n" + "> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\r\n" + "> > +%YAML 1.2\r\n" + "> > +---\r\n" + "> > +$id:\r\n" + "> > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,exdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!ldlqohpAoMyTt24UKnssKOk5Qvmc_wlvQPCdjneKDCeshDPwI5Uuuy4A2sI2RlfYLIFDKZx_-GGDOlX48Q$\r\n" + "> > +$schema:\r\n" + "> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!ldlqohpAoMyTt24UKnssKOk5Qvmc_wlvQPCdjneKDCeshDPwI5Uuuy4A2sI2RlfYLIFDKZx_-GHpxO9DFQ$\r\n" + "> > +\r\n" + "> > +title: MediaTek EXDMA\r\n" + "> > +\r\n" + "> > +maintainers:\r\n" + "> > +  - Chun-Kuang Hu <chunkuang.hu@kernel.org>\r\n" + "> > +  - Philipp Zabel <p.zabel@pengutronix.de>\r\n" + "> > +\r\n" + "> > +description:\r\n" + "> > +  The MediaTek display overlap extended DMA engine, namely\r\n" + "> > OVL_EXDMA or EXDMA,\r\n" + "> > +  primarily functions as a DMA engine for reading data from DRAM\r\n" + "> > with various\r\n" + "> > +  DRAM footprints and data formats. For input sources in certain\r\n" + "> > color formats\r\n" + "> > +  and color domains, OVL_EXDMA also includes a color transfer\r\n" + "> > function\r\n" + "> > +  to process pixels into a consistent color domain.\r\n" + "> > +\r\n" + "> \r\n" + "> Missing ref to dma schemas.\r\n" + "\r\n" + "allOf:\r\n" + "- $ref: dma-controller.yaml#\r\n" + "> \r\n" + "> > +properties:\r\n" + "> > +  compatible:\r\n" + "> > +    const: mediatek,mt8196-exdma\r\n" + "> > +\r\n" + "> > +  reg:\r\n" + "> > +    maxItems: 1\r\n" + "> > +\r\n" + "> > +  clocks:\r\n" + "> > +    items:\r\n" + "> > +      - description: EXDMA Clock\r\n" + "> > +\r\n" + "> > +  power-domains:\r\n" + "> > +    maxItems: 1\r\n" + "> > +\r\n" + "> > +  mediatek,larb:\r\n" + "> > +    $ref: /schemas/types.yaml#/definitions/phandle-array\r\n" + "> \r\n" + "> Why array? And isn't the property named mediatek,larbs?\r\n" + "> \r\n" + "Using "mediatek,larb" here is correct because the EXDMA hardware IP\r\n" + "will only have one mediatek,larb. In the next version, we will change\r\n" + "the phandle-array definition to a single phandle.\r\n" + "Please refer to this link:\r\n" + "https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/Documentation/devicetree/bindings?id=6d0990e6e844cfa045b1a7348f58964caceb4de4\r\n" + "Since MT8196 use SMMU, the SMMU can no longer internally determine the\r\n" + "connection relationship between smi-larb and the consumer's\r\n" + "pm_runtime_get(_sync). Therefore, we need to add this information back.\r\n" + "> > \r\n" + "> > \r\n" + "> > Best, Paul \r\n" + "\r\n" + "\r\n" + "</pre>\r\n" + "</p></body></html><!--type:text--><!--{--><pre>************* MEDIATEK Confidentiality Notice ********************\r\n" + "The information contained in this e-mail message (including any \r\n" + "attachments) may be confidential, proprietary, privileged, or otherwise\r\n" + "exempt from disclosure under applicable laws. It is intended to be \r\n" + "conveyed only to the designated recipient(s). Any use, dissemination, \r\n" + "distribution, printing, retaining or copying of this e-mail (including its \r\n" + "attachments) by unintended recipient(s) is strictly prohibited and may \r\n" + "be unlawful. If you are not an intended recipient of this e-mail, or believe \r\n" + "that you have received this e-mail in error, please notify the sender \r\n" + "immediately (by replying to this e-mail), delete any and all copies of \r\n" + "this e-mail (including any attachments) from your system, and do not\r\n" + "disclose the content of this e-mail to any other person. Thank you!\r\n" + </pre><!--}--> -40a021f2a1013f378ecd4401dcf11f43623c898bea07b38db017455eda13ff0e +88e7bec70132b00984b07befa02e788e9895c7f6bd2b39367521e7df6e4d3121
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