From: "Macpaul Lin (林智斌)" <Macpaul.Lin@mediatek.com>
To: Carlo Caione <ccaione@baylibre.com>,
GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
"u-boot@lists.u-boot-project.org"
<u-boot@lists.u-boot-project.org>
Cc: "Pablo Sun (孫毓翔)" <pablo.sun@mediatek.com>,
"Chris-qj Chen (陳奇進)" <Chris-qj.Chen@mediatek.com>,
"Bear Wang (萩原惟德)" <bear.wang@mediatek.com>,
"Chunfeng Yun (云春峰)" <Chunfeng.Yun@mediatek.com>,
"Julien Stephan" <jstephan@baylibre.com>,
"Vitor Sato Eschholz" <vsatoes@baylibre.com>,
"marek.vasut+renesas@mailbox.org"
<marek.vasut+renesas@mailbox.org>,
"igor.belwon@mentallysanemainliners.org"
<igor.belwon@mentallysanemainliners.org>,
"trini@konsulko.com" <trini@konsulko.com>,
"Julien Masson" <jmasson@baylibre.com>,
"Arnaud Ferraris" <arnaud.ferraris@collabora.com>,
"Ht Lin (林瀚宗)" <Ht.Lin@mediatek.com>,
"David Lechner" <dlechner@baylibre.com>,
"u-boot@0leil.net" <u-boot@0leil.net>,
"jbx6244@gmail.com" <jbx6244@gmail.com>,
"ilias.apalodimas@linaro.org" <ilias.apalodimas@linaro.org>,
"bastien.curutchet@bootlin.com" <bastien.curutchet@bootlin.com>,
"Suhrid Subramaniam" <Suhrid.Subramaniam@mediatek.com>,
"alchark@gmail.com" <alchark@gmail.com>,
"neil.armstrong@linaro.org" <neil.armstrong@linaro.org>,
"Ryder Lee" <Ryder.Lee@mediatek.com>,
"Weijie Gao (高惟杰)" <Weijie.Gao@mediatek.com>
Subject: Re: [PATCH v6 2/6] configs: mt8188: enable eMMC FIT boot from SPL
Date: Mon, 7 Sep 2026 03:45:19 +0000 [thread overview]
Message-ID: <c2562155eeddb00ddf922d627fda5e50ee67a68c.camel@mediatek.com> (raw)
In-Reply-To: <20260906-ccaione-upstream-mt8390-spl-v6-2-4d4a11d5741d@baylibre.com>
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On Sun, 2026-09-06 at 17:30 +0200, Carlo Caione wrote:
> Enable the shared Genio 510/700 SPL path entered by the external DDR
> loader. Keep BSS after the downstream SPL reservation, leaving a
> 0xc800
> guard after the copy window and space for the initial stack and early
> allocations. Use an 8 MiB heap for loading the firmware FIT.
>
> Load BL31, OP-TEE and U-Boot from eMMC partition 1 using generic SPL
> support. The MediaTek BL31 stalls when given a runtime devicetree as
> its
> platform parameter, so pass NULL there while retaining the standard
> firmware entry-point parameters.
>
> Signed-off-by: Vitor Sato Eschholz <vsatoes@baylibre.com>
> Signed-off-by: Julien Stephan <jstephan@baylibre.com>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> ---
> configs/mt8188.config | 33 +++++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/configs/mt8188.config b/configs/mt8188.config
> index 29e2b3db878..a7a59940646 100644
> --- a/configs/mt8188.config
> +++ b/configs/mt8188.config
> @@ -28,3 +28,36 @@ CONFIG_MTK_SERIAL=y
> CONFIG_WDT=y
> CONFIG_WDT_MTK=y
> # CONFIG_RANDOM_UUID is not set
> +CONFIG_SPL=y
> +# Fixed destination and copy window of the external DDR loader.
> +CONFIG_SPL_TEXT_BASE=0x40000000
> +CONFIG_SPL_MAX_SIZE=0xaf000
> +CONFIG_SPL_SEPARATE_BSS=y
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +# Preserve the downstream reservation, with a 0xc800-byte guard
> after SPL.
> +CONFIG_SPL_BSS_START_ADDR=0x400bb800
> +CONFIG_SPL_BSS_LIMIT=y
> +CONFIG_SPL_BSS_MAX_SIZE=0x10000
> +# Leave 448 KiB above the BSS limit for the stack, global data and
> early heap.
> +CONFIG_SYS_INIT_SP_BSS_OFFSET=0x80000
> +CONFIG_SPL_SYS_MALLOC=y
> +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
> +# Keep the heap separate from the loaded firmware and its reserved
> memory.
> +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x5c000000
> +CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
> +CONFIG_SPL_SYSCON=y
> +CONFIG_SPL_CLK=y
> +CONFIG_SPL_SERIAL=y
> +# CONFIG_SPL_USE_TINY_PRINTF is not set
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_SPL_PINCONF=y
> +CONFIG_SPL_WATCHDOG=y
> +CONFIG_SPL_MMC=y
> +CONFIG_SPL_LIBDISK_SUPPORT=y
> +CONFIG_SPL_EFI_PARTITION=y
> +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=1
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_SPL_ATF=y
> +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>
>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Thanks!
Macpaul Lin
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next prev parent reply other threads:[~2026-09-07 4:01 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-06 15:30 [PATCH v6 0/6] Add Genio 510 and Genio 700 SPL boot support Carlo Caione
2026-09-06 15:30 ` [PATCH v6 1/6] arm: dts: mediatek: prepare Genio 510 and 700 devices for SPL Carlo Caione
2026-09-09 19:33 ` David Lechner
2026-09-09 20:36 ` Carlo Caione
2026-09-06 15:30 ` [PATCH v6 2/6] configs: mt8188: enable eMMC FIT boot from SPL Carlo Caione
2026-09-07 3:45 ` Macpaul Lin (林智斌) [this message]
2026-09-09 19:35 ` David Lechner
2026-09-09 20:37 ` Carlo Caione
2026-09-06 15:30 ` [PATCH v6 3/6] arm: mediatek: build Genio 510 and 700 boot images with binman Carlo Caione
2026-09-09 19:39 ` David Lechner
2026-09-09 20:42 ` Carlo Caione
2026-09-06 15:30 ` [PATCH v6 4/6] arm: dts: mediatek: support signed Genio 510 and 700 bootloader FIT Carlo Caione
2026-09-06 15:30 ` [PATCH v6 5/6] arm: dts: mediatek: emit the Genio 510 and 700 BootROM payload Carlo Caione
2026-09-06 15:30 ` [PATCH v6 6/6] doc: board: mediatek: document Genio 510 and 700 SPL boot Carlo Caione
2026-09-07 3:48 ` Macpaul Lin (林智斌)
2026-09-09 19:56 ` David Lechner
2026-09-09 20:54 ` Carlo Caione
2026-09-09 20:58 ` Carlo Caione
2026-09-09 21:00 ` David Lechner
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