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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-394ebbcbb78sm1556274a91.13.2026.08.14.00.48.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 14 Aug 2026 00:48:54 -0700 (PDT) Message-ID: Date: Fri, 14 Aug 2026 13:18:46 +0530 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 09/15] pinctrl: qcom: Add Kuno pinctrl driver To: Bartosz Golaszewski Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Michael Turquette , Stephen Boyd , Brian Masney , Taniya Das , Georgi Djakov , Linus Walleij , Thomas Gleixner , Radu Rendec , Robert Marko , Guru Das Srinagesh References: <20260809-kuno-soc-support-v1-0-5e0ede4a0c72@oss.qualcomm.com> <20260809-kuno-soc-support-v1-9-5e0ede4a0c72@oss.qualcomm.com> Content-Language: en-US From: Hardeep Sharma In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=K4MS2SWI c=1 sm=1 tr=0 ts=6a7ec868 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=S7Hclr-U69tWnHOGgbMA:9 a=QEXdDO2ut3YA:10 a=O8hF6Hzn-FEA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE0MDA1OSBTYWx0ZWRfXyNURBoe3fJ8y YaVwAqLYLLvBL0m9C4hRxnIryAn7sJ55/gB1X1EVrDdlyea6OR6lUyRhBUvMFhNBUie2Zs6rCNa QLtk1TTM6m0CvTtL0cv0MFE5xDpOUNV4+Xw4B8PRk6BYkRfVmZzuxjoug8figvUbLJ8gu+vxbiM QsKwckIEibFudRHPlmRVyq3Z0PtjS9sj2YJ8VF7MQhTgOZNlAPiZiusrQSf6zzTlTK9NdmgiTmq P8qQRIBruCeMV8kcPcSciJ2WR0c0F92Vr2Po1MRvPn6Wxz6uVpT5WMOvm7n12X0VdO5I05WaiEJ CptRQY5I5o3+zdohrnoJjR+6vb9GuHuhomUAHsg+XZX5GxeTFiXf/tLGga1YJxvepODWPcLxPib pcsOkdyGhsTg2MDgnRb4s+wpKoZv7FIEgGC0/h9Q31DpZzdFFFH0oHca+AGhxisa7eVKrbp3OFm LZM8JRKqBMU+q0iEKuA== X-Proofpoint-GUID: tRaSCXhxntWtkgKLaTqJjLX9OqbXUFcW X-Proofpoint-ORIG-GUID: tRaSCXhxntWtkgKLaTqJjLX9OqbXUFcW X-Proofpoint-Spam-Info: AW1haW4tMjYwODE0MDA1OSBTYWx0ZWRfXyf7ylbBVozrB rWPN+Yw7p7YTB2ZwK86eR0uWq6o2ZKATxUurjWng3X6FLeOLR25FX9pm0cCRdgD/0zjY1xyeMan Am3kfeaxVAsG09iuJKRTwWNWhCTTQO0= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-14_03,2026-08-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 spamscore=0 adultscore=0 clxscore=1015 malwarescore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608140059 On 8/10/2026 4:33 PM, Bartosz Golaszewski wrote: > On Sun, 9 Aug 2026 09:27:08 +0200, Hardeep Sharma > said: >> Add the TLMM pinctrl driver for the Qualcomm Kuno platform, supporting >> 110 GPIOs and their pin multiplexing, pin configuration and gpiolib >> interface through the common pinctrl-msm driver. >> >> Signed-off-by: Hardeep Sharma >> --- >> + > ... > >> +static const struct pinfunction kuno_functions[] = { >> + MSM_PIN_FUNCTION(gpio), > MSM_GPIO_PIN_FUNCTION() ? Thanks for review. Done in v2 : https://lore.kernel.org/all/20260814-kuno-soc-support-v2-0-3079794f0f73@oss.qualcomm.com/ Best Wishes Hardeep Sharma > >> + MSM_PIN_FUNCTION(audio_ref_clk), >> + MSM_PIN_FUNCTION(coex_uart), >> + MSM_PIN_FUNCTION(ebi2_lcd_a), >> + MSM_PIN_FUNCTION(ebi2_lcd_cs), >> + MSM_PIN_FUNCTION(ebi2_lcd_reset), >> + MSM_PIN_FUNCTION(ebi2_lcd_te), >> + MSM_PIN_FUNCTION(emac_mdc), >> + MSM_PIN_FUNCTION(emac_mdio), >> + MSM_PIN_FUNCTION(emac_pps_in), >> + MSM_PIN_FUNCTION(emac_ptp_aux), >> + MSM_PIN_FUNCTION(emac_ptp_pps), >> + MSM_PIN_FUNCTION(gcc_gp1_clk), >> + MSM_PIN_FUNCTION(gcc_gp2_clk), >> + MSM_PIN_FUNCTION(gcc_gp3_clk), >> + MSM_PIN_FUNCTION(mi2s0_data0), >> + MSM_PIN_FUNCTION(mi2s0_data1), >> + MSM_PIN_FUNCTION(mi2s0_sck), >> + MSM_PIN_FUNCTION(mi2s0_ws), >> + MSM_PIN_FUNCTION(mi2s1_data0), >> + MSM_PIN_FUNCTION(mi2s1_data1), >> + MSM_PIN_FUNCTION(mi2s1_sck), >> + MSM_PIN_FUNCTION(mi2s1_ws), >> + MSM_PIN_FUNCTION(mi2s_mclk), >> + MSM_PIN_FUNCTION(nav_gpio), > Possibly here too? This one not required. Grepped the tree for peer TLMM drivers that expose a `nav_gpio` function: all 10 use MSM_PIN_FUNCTION(nav_gpio, ...), none use MSM_GPIO_PIN_FUNCTION. Kuno matches that convention. Best Wishes Hardeep Sharma > >> + MSM_PIN_FUNCTION(pci_e_rst), >> + MSM_PIN_FUNCTION(pcie_clkreq_n), >> + MSM_PIN_FUNCTION(pll_bist_sync), >> + MSM_PIN_FUNCTION(pll_clk_aux), >> + MSM_PIN_FUNCTION(qdss_cti_trig0), >> + MSM_PIN_FUNCTION(qdss_cti_trig1), >> + MSM_PIN_FUNCTION(qdss_gpio_traceclk), >> + MSM_PIN_FUNCTION(qdss_gpio_tracectl), >> + MSM_PIN_FUNCTION(qup0_se0), >> + MSM_PIN_FUNCTION(qup0_se1), >> + MSM_PIN_FUNCTION(qup0_se2), >> + MSM_PIN_FUNCTION(qup0_se3_mira), >> + MSM_PIN_FUNCTION(qup0_se3_mirb), >> + MSM_PIN_FUNCTION(qup0_se4), >> + MSM_PIN_FUNCTION(sdc4_clk), >> + MSM_PIN_FUNCTION(sdc4_cmd), >> + MSM_PIN_FUNCTION(sdc4_data), >> + MSM_PIN_FUNCTION(sdc4_tb_trig), >> + MSM_PIN_FUNCTION(sgmii_phy_intr), >> + MSM_PIN_FUNCTION(spmi_coex_clk), >> + MSM_PIN_FUNCTION(spmi_coex_data), >> + MSM_PIN_FUNCTION(spmi_vgi_hwevent), >> + MSM_PIN_FUNCTION(uim1_clk), >> + MSM_PIN_FUNCTION(uim1_data), >> + MSM_PIN_FUNCTION(uim1_present), >> + MSM_PIN_FUNCTION(uim1_reset), >> + MSM_PIN_FUNCTION(usb2phy_ac_en), >> +}; >> + > Bart