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Content-Language: en-US To: John Watts , alsa-devel@alsa-project.org References: From: Pierre-Louis Bossart In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Message-ID-Hash: QJ5ZSR6QT2N2Z37HX4ZEIWMCI352E2DZ X-Message-ID-Hash: QJ5ZSR6QT2N2Z37HX4ZEIWMCI352E2DZ X-MailFrom: pierre-louis.bossart@linux.intel.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On 7/26/23 12:48 AM, John Watts wrote: > Hello there! > > I have an interesting problem that I'm trying to solve. It will require > writing adding driver support but right now I'm struggling to understand > how I should go about it all. > > As a background, this is with the Allwinner D1 or T113. It has a 16 > channel I2S controller and each channel can be configured to use a > specific pin and TDM time slice. Even channels are low LRCLK, odd are > high LRCLK. > > So for my situation I want to have six channels: > > - Channel 0: Timeslot 0, Pin 0, LRCLK 0 -> ADC 1 > - Channel 1: Timeslot 0, Pin 0, LRCLK 1 -> ADC 1 > - Channel 2: Timeslot 0, Pin 1, LRCLK 0 -> ADC 2 > - Channel 3: Timeslot 0, Pin 1, LRCLK 1 -> ADC 2 > - Channel 4: Timeslot 0, Pin 2, LRCLK 0 -> ADC 3 > - Channel 5: Timeslot 0, Pin 2, LRCLK 1 -> ADC 3 It would help if you described what those different 'channels' are supposed to transmit. Usually channels mean a group of data that is rendered at the same time. It looks like you plan on transmitting independent streams that may be enabled/disabled separately. Also you should describe if there are independent clocks or if all those 6 'channels' are transmitted with a single pair of bit/frame clocks? That completely changes the model, in the former case you could represent independent DAIs/dailinks but in the latter case you really have a single muxed stream.