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Fri, 19 Jun 2026 22:32:33 GMT Received: from smtprelay07.dal12v.mail.ibm.com ([172.16.1.9]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 4ev172avc9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Jun 2026 22:32:33 +0000 (GMT) Received: from smtpav03.wdc07v.mail.ibm.com (smtpav03.wdc07v.mail.ibm.com [10.39.53.230]) by smtprelay07.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 65JMWWZo1573488 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 19 Jun 2026 22:32:32 GMT Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F42255805C; Fri, 19 Jun 2026 22:32:31 +0000 (GMT) Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E6EC158066; Fri, 19 Jun 2026 22:32:30 +0000 (GMT) Received: from [9.61.241.74] (unknown [9.61.241.74]) by smtpav03.wdc07v.mail.ibm.com (Postfix) with ESMTP; Fri, 19 Jun 2026 22:32:30 +0000 (GMT) Message-ID: Date: Fri, 19 Jun 2026 15:32:29 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 13/15] s390x/pci: Add a comment explaining S390PCIIOMMU purpose To: Matthew Rosato , Konstantin Shkolnyy Cc: richard.henderson@linaro.org, iii@linux.ibm.com, david@kernel.org, cohuck@redhat.com, pasic@linux.ibm.com, borntraeger@linux.ibm.com, qemu-s390x@nongnu.org, qemu-devel@nongnu.org References: <20260605021728.1125090-1-kshk@linux.ibm.com> <20260605021728.1125090-14-kshk@linux.ibm.com> <1db93e1b-b7a6-4aa4-8432-fa7f114b9985@linux.ibm.com> Content-Language: en-US From: Farhan Ali In-Reply-To: <1db93e1b-b7a6-4aa4-8432-fa7f114b9985@linux.ibm.com> Content-Type: text/plain; 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envelope-from=alifm@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/19/2026 10:39 AM, Matthew Rosato wrote: > On 6/4/26 10:17 PM, Konstantin Shkolnyy wrote: >> Signed-off-by: Konstantin Shkolnyy > Commit message needs something here -- You don't need to include the > explanation of the structure (that's in the commit itself) but maybe > describe the context (e.g. you're adding the comment because you just > moved most of the contents of the structure out in support of migration > and are now describing the remaining purpose) > >> --- >> include/hw/s390x/s390-pci-bus.h | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/include/hw/s390x/s390-pci-bus.h b/include/hw/s390x/s390-pci-bus.h >> index e3cbee2695..2fab28e6e0 100644 >> --- a/include/hw/s390x/s390-pci-bus.h >> +++ b/include/hw/s390x/s390-pci-bus.h >> @@ -271,6 +271,14 @@ typedef struct S390PCIDMACount { >> QTAILQ_ENTRY(S390PCIDMACount) link; >> } S390PCIDMACount; >> >> +/* >> + * This structure holds the PCI device AddressSpace that QEMU needs to link >> + * into its internal structures before the zPCI and PCI devices are fully >> + * initialized. It's a QEMU requirement to provide this "root" AddressSpace >> + * early. The AddressSpace is only actually used for I/O while the PCI >> + * device is plugged in and configured by the guest, at which time it gets >> + * additional memory subregions from zPCI device, that can do real work. >> + */ > To be more clear, it's not that it is required 'early' so much as that > it is required to be there at the time the PCI device is plugged. > > The lifecycle has always been a bit odd here; it is an attribute of the > zPCI device, but is required by the PCI device in order to function and > the necessary linkage between the 2 (PCI->zPCI) is established via the > iommu_table in the S390pciState. Would be good to work some of that > into this explanation. +1 I think we moving few fields from the struct, so having an explanation why do we need the remaining fields would be helpful. Also can this struct be extended in the future without any issues and breaking? If not then maybe adding something about would that would also be helpful. Thanks Farhan >> struct S390PCIIOMMU { >> Object parent_obj; >> AddressSpace as;