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diff for duplicates of <c403de1d-cda8-45bc-a6a2-a92170ad8575@sifive.com>

diff --git a/a/1.txt b/N1/1.txt
index dc996ca..9931cc2 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -169,3 +169,9 @@ Samuel
 >  		/*
 >  		 * All "okay" harts should have same isa. Set HWCAP based on
 >  		 * common capabilities of every "okay" hart, in case they don't.
+
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index 9aa601d..1a53ee4 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,37 @@
  "ref\020240712083850.4242-1-yongxuan.wang@sifive.com\0"
  "ref\020240712083850.4242-2-yongxuan.wang@sifive.com\0"
  "From\0Samuel Holland <samuel.holland@sifive.com>\0"
- "Subject\0[PATCH v7 1/4] RISC-V: Add Svade and Svadu Extensions Support\0"
+ "Subject\0Re: [PATCH v7 1/4] RISC-V: Add Svade and Svadu Extensions Support\0"
  "Date\0Thu, 18 Jul 2024 18:35:19 -0500\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0Yong-Xuan Wang <yongxuan.wang@sifive.com>\0"
+ "Cc\0greentime.hu@sifive.com"
+  vincent.chen@sifive.com
+  Jinyu Tang <tjytimi@163.com>
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Palmer Dabbelt <palmer@dabbelt.com>
+  Albert Ou <aou@eecs.berkeley.edu>
+  Andrew Jones <ajones@ventanamicro.com>
+  Anup Patel <anup@brainfault.org>
+  Conor Dooley <conor.dooley@microchip.com>
+  Mayuresh Chitale <mchitale@ventanamicro.com>
+  Atish Patra <atishp@rivosinc.com>
+  Samuel Ortiz <sameo@rivosinc.com>
+  Daniel Henrique Barboza <dbarboza@ventanamicro.com>
+ " Cl\303\251ment L\303\251ger <cleger@rivosinc.com>"
+  Evan Green <evan@rivosinc.com>
+  Xiao Wang <xiao.w.wang@intel.com>
+  Alexandre Ghiti <alexghiti@rivosinc.com>
+  Andrew Morton <akpm@linux-foundation.org>
+  Kemeng Shi <shikemeng@huaweicloud.com>
+  Mike Rapoport (IBM) <rppt@kernel.org>
+  Leonardo Bras <leobras@redhat.com>
+  Charlie Jenkins <charlie@rivosinc.com>
+  Matthew Wilcox (Oracle) <willy@infradead.org>
+  Jisheng Zhang <jszhang@kernel.org>
+  linux-kernel@vger.kernel.org
+  linux-riscv@lists.infradead.org
+  kvm-riscv@lists.infradead.org
+ " kvm@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "Hi Yong-Xuan,\n"
@@ -176,6 +204,12 @@
  "> +\n"
  ">  \t\t/*\n"
  ">  \t\t * All \"okay\" harts should have same isa. Set HWCAP based on\n"
- ">  \t\t * common capabilities of every \"okay\" hart, in case they don't."
+ ">  \t\t * common capabilities of every \"okay\" hart, in case they don't.\n"
+ "\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-b4414fcf98ca9f79ea18199e463191ce12f84bf27d0dfad28911610d8c21e23d
+878f525bcc9f4de77f14cd947c83c3d18176179067456a49940c1cac442c37ca

diff --git a/a/content_digest b/N2/content_digest
index 9aa601d..dedd075 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,9 +1,37 @@
  "ref\020240712083850.4242-1-yongxuan.wang@sifive.com\0"
  "ref\020240712083850.4242-2-yongxuan.wang@sifive.com\0"
  "From\0Samuel Holland <samuel.holland@sifive.com>\0"
- "Subject\0[PATCH v7 1/4] RISC-V: Add Svade and Svadu Extensions Support\0"
+ "Subject\0Re: [PATCH v7 1/4] RISC-V: Add Svade and Svadu Extensions Support\0"
  "Date\0Thu, 18 Jul 2024 18:35:19 -0500\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0Yong-Xuan Wang <yongxuan.wang@sifive.com>\0"
+ "Cc\0greentime.hu@sifive.com"
+  vincent.chen@sifive.com
+  Jinyu Tang <tjytimi@163.com>
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Palmer Dabbelt <palmer@dabbelt.com>
+  Albert Ou <aou@eecs.berkeley.edu>
+  Andrew Jones <ajones@ventanamicro.com>
+  Anup Patel <anup@brainfault.org>
+  Conor Dooley <conor.dooley@microchip.com>
+  Mayuresh Chitale <mchitale@ventanamicro.com>
+  Atish Patra <atishp@rivosinc.com>
+  Samuel Ortiz <sameo@rivosinc.com>
+  Daniel Henrique Barboza <dbarboza@ventanamicro.com>
+ " Cl\303\251ment L\303\251ger <cleger@rivosinc.com>"
+  Evan Green <evan@rivosinc.com>
+  Xiao Wang <xiao.w.wang@intel.com>
+  Alexandre Ghiti <alexghiti@rivosinc.com>
+  Andrew Morton <akpm@linux-foundation.org>
+  Kemeng Shi <shikemeng@huaweicloud.com>
+  Mike Rapoport (IBM) <rppt@kernel.org>
+  Leonardo Bras <leobras@redhat.com>
+  Charlie Jenkins <charlie@rivosinc.com>
+  Matthew Wilcox (Oracle) <willy@infradead.org>
+  Jisheng Zhang <jszhang@kernel.org>
+  linux-kernel@vger.kernel.org
+  linux-riscv@lists.infradead.org
+  kvm-riscv@lists.infradead.org
+ " kvm@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "Hi Yong-Xuan,\n"
@@ -178,4 +206,4 @@
  ">  \t\t * All \"okay\" harts should have same isa. Set HWCAP based on\n"
  ">  \t\t * common capabilities of every \"okay\" hart, in case they don't."
 
-b4414fcf98ca9f79ea18199e463191ce12f84bf27d0dfad28911610d8c21e23d
+aaf870813281414d0b37780265b11980d4c14d863c7469ec00d218cd87840b5b

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