From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: specify the address of the semaphore register for comparison Date: Wed, 21 Sep 2011 15:49:07 +0100 Message-ID: References: <1316605343-611-1-git-send-email-chris@chris-wilson.co.uk> <20110921072503.53550c40@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id B00C29E7CC for ; Wed, 21 Sep 2011 07:49:11 -0700 (PDT) In-Reply-To: <20110921072503.53550c40@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, 21 Sep 2011 07:25:03 -0700, Ben Widawsky wrote: > On Wed, 21 Sep 2011 12:42:22 +0100 > Chris Wilson wrote: > > --- > > drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ++- > > 1 files changed, 2 insertions(+), 1 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c > > b/drivers/gpu/drm/i915/intel_ringbuffer.c index 5fa3d99..6b9790e > > 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > > @@ -359,7 +359,8 @@ intel_ring_sync(struct intel_ring_buffer *ring, > > intel_ring_sync_index(ring, to) << 17 | > > MI_SEMAPHORE_COMPARE); > > intel_ring_emit(ring, seqno); > > - intel_ring_emit(ring, 0); > > + intel_ring_emit(ring, > > + RING_SYNC_0(to->mmio_base) + > > 4*intel_ring_sync_index(ring,to)); intel_ring_emit(ring, MI_NOOP); > > intel_ring_advance(ring); > > > > I'm sort of afraid this is just papering over the issue, ie. the mmio > access is just adding delay that happens to make it work. I think we > should follow up with devs on this one. In the broken English from the spec in front of me: PointerBitFieldName/MMIO Register Address Project: All Address: GraphicsVirtualAddress[31:2] Surface Type: Semaphore if Compare Register bit[18] is set, this field if the Graphics Memory Address of the 32 bit value for the semaphore. If Compare Register bit[18] is cleared, this field is the MMIO address of the register for the semaphore. I'm embarrassed to have only set the field for Update and not Compare. -Chris -- Chris Wilson, Intel Open Source Technology Centre