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From: Tim Chen <tim.c.chen@linux.intel.com>
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Date: Wed, 2 May 2018 21:27:09 -0700
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From: Tim Chen <tim.c.chen@linux.intel.com>
To: speck for Thomas Gleixner <speck@linutronix.de>
Subject: Re: [patch V11 00/16] SSB 0

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On 05/02/2018 02:51 PM, speck for Thomas Gleixner wrote:
> Changes since V10:
>=20
>   - Addressed Ingos review feedback
>=20
>   - Picked up Reviewed-bys
>=20
> Delta patch below. Bundle is coming in separate mail. Git repo branches=
 are
> updated as well. The master branch contains also the fix for the lost I=
BRS
> issue Tim was seeing.
>=20
> If there are no further issues and nitpicks, I'm going to make the
> changes immutable and changes need to go incremental on top.
>=20
> Thanks,
>=20
> 	tglx
>=20
>=20

I notice that this code ignores the current process's TIF_RDS setting
in the prctl case:

#define firmware_restrict_branch_speculation_end()                      \=

do {                                                                    \=

        u64 val =3D x86_get_default_spec_ctrl();                         =
 \
                                                                        \=

        alternative_msr_write(MSR_IA32_SPEC_CTRL, val,                  \=

                              X86_FEATURE_USE_IBRS_FW);                 \=

        preempt_enable();                                               \=

} while (0)

x86_get_default_spec_ctrl will return x86_spec_ctrl_base, which
will result in x86_spec_ctrl_base written to the MSR
in the prctl case for Intel CPU.  That incorrectly ignores current
process's TIF_RDS setting and the RDS bit will not be set.

Instead, the following value should have been written to the MSR
for Intel CPU:
x86_spec_ctrl_base | rds_tif_to_spec_ctrl(current_thread_info()->flags)

Thanks.

Tim


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