From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Roger Pau Monne <roger.pau@citrix.com>, <xen-devel@lists.xenproject.org>
Cc: Wei Liu <wl@xen.org>, Jan Beulich <jbeulich@suse.com>, paul@xen.org
Subject: Re: [PATCH for-4.14 2/2] x86/passthrough: introduce a flag for GSIs not requiring an EOI or unmask
Date: Wed, 10 Jun 2020 13:37:15 +0100 [thread overview]
Message-ID: <c70eef2d-d780-6d76-decb-e921cf6a570c@citrix.com> (raw)
In-Reply-To: <20200610115103.7592-3-roger.pau@citrix.com>
On 10/06/2020 12:51, Roger Pau Monne wrote:
> @@ -920,6 +927,11 @@ static void hvm_dirq_assist(struct domain *d, struct hvm_pirq_dpci *pirq_dpci)
> if ( pirq_dpci->flags & HVM_IRQ_DPCI_IDENTITY_GSI )
> {
> hvm_gsi_assert(d, pirq->pirq);
> + if ( pirq_dpci->flags & HVM_IRQ_DPCI_NO_EOI )
> + {
> + spin_unlock(&d->event_lock);
> + return;
> + }
Urgh. Could I possibly talk you into fixing hvm_dirq_assist() to have a
"goto out;" and a single unlock path ? (How far are you expecting this
to be backported?)
I'm also totally unconvinced that the atomic test_and_clear() needs to
be done with the event lock held (it should either be non-atomic, or the
locking should be inside the if() condition), but that is probably not a
can of worms wanting opening right now...
~Andrew
next prev parent reply other threads:[~2020-06-10 12:37 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-10 11:51 [PATCH for-4.14 0/2] x86/passthrough: fixes for PVH dom0 edge triggered interrupts Roger Pau Monne
2020-06-10 11:51 ` [PATCH for-4.14 1/2] x86/passthrough: do not assert edge triggered GSIs for PVH dom0 Roger Pau Monne
2020-06-10 12:29 ` Andrew Cooper
2020-06-10 12:33 ` Paul Durrant
2020-06-10 12:40 ` Roger Pau Monné
2020-06-10 11:51 ` [PATCH for-4.14 2/2] x86/passthrough: introduce a flag for GSIs not requiring an EOI or unmask Roger Pau Monne
2020-06-10 12:37 ` Andrew Cooper [this message]
2020-06-10 12:46 ` Roger Pau Monné
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