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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260904122330.306936-1-ross.lagerwall@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1788783892-FC212034-6DA51CC8/0/0 X-purgate-type: clean X-purgate-size: 3202 On 04.09.2026 14:23, Ross Lagerwall wrote: > Since 3356d685dbda ("x86/svm: Remove lazy FPU support"), Xen does not > need to track when the TS or MP bits change so opt to intercept CR0 > writes selectively. Aside from potentially reducing a few VMEXITs, this > fixes a nested virt bug where L1 intercepts CR0_SEL_WRITE and L0 > intercepts CR0_WRITE. The hardware prioritizes CR0_WRITE and so L1 never > sees any CR0 writes. > > Since CR0 may now change behind Xen's back, sync it on VMEXIT so that > the emulator sees the correct value. > > Signed-off-by: Ross Lagerwall Reviewed-by: Jan Beulich with two remarks (which I may take the liberty of carrying out while committing): > --- a/xen/arch/x86/hvm/svm/vmcb.c > +++ b/xen/arch/x86/hvm/svm/vmcb.c > @@ -50,13 +50,13 @@ static int construct_vmcb(struct vcpu *v) > struct vmcb_struct *vmcb = svm->vmcb; > > vmcb->_general1_intercepts = > - GENERAL1_INTERCEPT_INTR | GENERAL1_INTERCEPT_NMI | > - GENERAL1_INTERCEPT_SMI | GENERAL1_INTERCEPT_INIT | > - GENERAL1_INTERCEPT_CPUID | GENERAL1_INTERCEPT_INVD | > - GENERAL1_INTERCEPT_HLT | GENERAL1_INTERCEPT_INVLPG | > - GENERAL1_INTERCEPT_INVLPGA | GENERAL1_INTERCEPT_IOIO_PROT | > - GENERAL1_INTERCEPT_MSR_PROT | GENERAL1_INTERCEPT_SHUTDOWN_EVT| > - GENERAL1_INTERCEPT_TASK_SWITCH; > + GENERAL1_INTERCEPT_INTR | GENERAL1_INTERCEPT_NMI | > + GENERAL1_INTERCEPT_SMI | GENERAL1_INTERCEPT_INIT | > + GENERAL1_INTERCEPT_CR0_SEL_WRITE | GENERAL1_INTERCEPT_CPUID | > + GENERAL1_INTERCEPT_INVD | GENERAL1_INTERCEPT_HLT | > + GENERAL1_INTERCEPT_INVLPG | GENERAL1_INTERCEPT_INVLPGA | > + GENERAL1_INTERCEPT_IOIO_PROT | GENERAL1_INTERCEPT_MSR_PROT | > + GENERAL1_INTERCEPT_TASK_SWITCH | GENERAL1_INTERCEPT_SHUTDOWN_EVT; I think it would be nice to avoid moving the |-s out, to keep ... > vmcb->_general2_intercepts = > GENERAL2_INTERCEPT_VMRUN | GENERAL2_INTERCEPT_VMMCALL | > GENERAL2_INTERCEPT_VMLOAD | GENERAL2_INTERCEPT_VMSAVE | ... aligning with the ones here. > @@ -76,8 +76,12 @@ static int construct_vmcb(struct vcpu *v) > /* Intercept all debug-register writes. */ > vmcb->_dr_intercepts = ~0u; > > - /* Intercept all control-register accesses except for CR2 and CR8. */ > - vmcb->_cr_intercepts = ~(CR_INTERCEPT_CR2_READ | > + /* > + * Intercept all control-register accesses except for CR0 writes (use > + * selective write instead), and CR2 and CR8 reads/writes. > + */ Imo slightly more precise as "... (using selective write intercept instead) ..." Jan > + vmcb->_cr_intercepts = ~(CR_INTERCEPT_CR0_WRITE | > + CR_INTERCEPT_CR2_READ | > CR_INTERCEPT_CR2_WRITE | > CR_INTERCEPT_CR8_READ | > CR_INTERCEPT_CR8_WRITE);