From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22B7BC433E0 for ; Tue, 16 Mar 2021 11:42:27 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9BE9465020 for ; Tue, 16 Mar 2021 11:42:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9BE9465020 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=OsGJFWrQYZo7svcWSYhaG5Zva4UBBIm+feD37GB75OU=; b=qY4/fnbaQgGznp/5D9HXttm4/ z5OeaC9FAi64yU+ekl28ScArLRrDSLCHWKmMLFywNqjCJj80JMGKC22iu9OfaYY/7z+brgi7PqrV2 l3FjYJHATBhUhUnlr/B5xNoyK8czLZTd43/PyrCjZOgFS5wH7l+G0jMNIhZof/fuNGyqh9ZqOqtxw DlItqSQeMcTh5XJ3K6EUFggULFzMgo3dd1aKpVg2wDg+PFhgccpe3Leae5wiD8EbS75Ju8kbZyY2L ggn540Y5ZuFYE+sLk5Ux/YiI9NsQDqPwQFNRn6gR+j0OE1ymk/PQ22FbkAkgBo7L7fq+nULDK9SUD 4QNtifpgA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lM84h-000bSK-IP; Tue, 16 Mar 2021 11:41:23 +0000 Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lM84c-000bRf-IF for linux-arm-kernel@lists.infradead.org; Tue, 16 Mar 2021 11:41:21 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 506F7D6E; Tue, 16 Mar 2021 04:41:13 -0700 (PDT) Received: from [10.57.17.216] (unknown [10.57.17.216]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A97E83F70D; Tue, 16 Mar 2021 04:41:11 -0700 (PDT) Subject: Re: [PATCH][for-stable-v5.11]] arm64: Unconditionally set virtual cpu id registers To: Greg KH Cc: linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, dbrazdil@google.com References: <20210316112500.85268-1-vladimir.murzin@arm.com> From: Vladimir Murzin Message-ID: Date: Tue, 16 Mar 2021 11:41:26 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210316_114118_829350_878C9152 X-CRM114-Status: GOOD ( 11.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 3/16/21 11:31 AM, Greg KH wrote: > On Tue, Mar 16, 2021 at 11:25:00AM +0000, Vladimir Murzin wrote: >> Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") >> reorganized el2 setup in such way that virtual cpu id registers set >> only in nVHE, yet they used (and need) to be set irrespective VHE >> support. Lack of setup causes 32-bit guest stop booting due to MIDR >> stay undefined. >> >> Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") >> Signed-off-by: Vladimir Murzin >> --- >> >> There is no upstream fix since issue went away due to code there has >> been reworked in 5.12: nVHE comes first, so virtual cpu id register >> are always set. >> >> Maintainers, please, Ack. > > Why not just use the "rework" patch instead that fixes this issue?> > > that's always preferred instead of one-off patches. That's moderate size patch series [1] which brings new functionality, but more importantly move boot flow upside down, where we first boot nVHE and then switch to VHE if supported. I think that a lot of change to carry in stable compare to proposed fix. [1] https://lore.kernel.org/kvmarm/20210208095732.3267263-2-maz@kernel.org/ Cheers Vladimir > > thanks, > > greg k-h > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A39FAC433DB for ; Tue, 16 Mar 2021 11:41:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 76D3765023 for ; Tue, 16 Mar 2021 11:41:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237419AbhCPLlS (ORCPT ); Tue, 16 Mar 2021 07:41:18 -0400 Received: from foss.arm.com ([217.140.110.172]:34608 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237416AbhCPLlN (ORCPT ); Tue, 16 Mar 2021 07:41:13 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 506F7D6E; Tue, 16 Mar 2021 04:41:13 -0700 (PDT) Received: from [10.57.17.216] (unknown [10.57.17.216]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A97E83F70D; Tue, 16 Mar 2021 04:41:11 -0700 (PDT) Subject: Re: [PATCH][for-stable-v5.11]] arm64: Unconditionally set virtual cpu id registers To: Greg KH Cc: linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, dbrazdil@google.com References: <20210316112500.85268-1-vladimir.murzin@arm.com> From: Vladimir Murzin Message-ID: Date: Tue, 16 Mar 2021 11:41:26 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On 3/16/21 11:31 AM, Greg KH wrote: > On Tue, Mar 16, 2021 at 11:25:00AM +0000, Vladimir Murzin wrote: >> Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") >> reorganized el2 setup in such way that virtual cpu id registers set >> only in nVHE, yet they used (and need) to be set irrespective VHE >> support. Lack of setup causes 32-bit guest stop booting due to MIDR >> stay undefined. >> >> Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") >> Signed-off-by: Vladimir Murzin >> --- >> >> There is no upstream fix since issue went away due to code there has >> been reworked in 5.12: nVHE comes first, so virtual cpu id register >> are always set. >> >> Maintainers, please, Ack. > > Why not just use the "rework" patch instead that fixes this issue?> > > that's always preferred instead of one-off patches. That's moderate size patch series [1] which brings new functionality, but more importantly move boot flow upside down, where we first boot nVHE and then switch to VHE if supported. I think that a lot of change to carry in stable compare to proposed fix. [1] https://lore.kernel.org/kvmarm/20210208095732.3267263-2-maz@kernel.org/ Cheers Vladimir > > thanks, > > greg k-h >