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From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Matthew Auld <matthew.auld@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/dmabuf: drop the flush on discrete
Date: Fri, 22 Oct 2021 11:26:14 +0200	[thread overview]
Message-ID: <c8e40d5f-beda-d5fd-9aa7-df951ba819b2@linux.intel.com> (raw)
In-Reply-To: <20211021125332.2455288-2-matthew.auld@intel.com>

Hi, Matt

On 10/21/21 14:53, Matthew Auld wrote:
> We were overzealous here; even though discrete is non-LLC, it should
> still be always coherent.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> index a45d0ec2c5b6..848e81368043 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> @@ -251,7 +251,8 @@ static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
>   		return PTR_ERR(pages);
>   
>   	/* XXX: consider doing a vmap flush or something */
> -	if (!HAS_LLC(i915) || i915_gem_object_can_bypass_llc(obj))
> +	if ((!HAS_LLC(i915) && !IS_DGFX(i915)) ||

Q: I notice that DG1 at least has HAS_SNOOP. Would it be incorrect to 
use that in this case?

/Thomas



> +	    i915_gem_object_can_bypass_llc(obj))
>   		wbinvd_on_all_cpus();
>   
>   	sg_page_sizes = i915_sg_dma_sizes(pages->sgl);

WARNING: multiple messages have this Message-ID (diff)
From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Matthew Auld <matthew.auld@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915/dmabuf: drop the flush on discrete
Date: Fri, 22 Oct 2021 11:26:14 +0200	[thread overview]
Message-ID: <c8e40d5f-beda-d5fd-9aa7-df951ba819b2@linux.intel.com> (raw)
In-Reply-To: <20211021125332.2455288-2-matthew.auld@intel.com>

Hi, Matt

On 10/21/21 14:53, Matthew Auld wrote:
> We were overzealous here; even though discrete is non-LLC, it should
> still be always coherent.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> index a45d0ec2c5b6..848e81368043 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> @@ -251,7 +251,8 @@ static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
>   		return PTR_ERR(pages);
>   
>   	/* XXX: consider doing a vmap flush or something */
> -	if (!HAS_LLC(i915) || i915_gem_object_can_bypass_llc(obj))
> +	if ((!HAS_LLC(i915) && !IS_DGFX(i915)) ||

Q: I notice that DG1 at least has HAS_SNOOP. Would it be incorrect to 
use that in this case?

/Thomas



> +	    i915_gem_object_can_bypass_llc(obj))
>   		wbinvd_on_all_cpus();
>   
>   	sg_page_sizes = i915_sg_dma_sizes(pages->sgl);

  reply	other threads:[~2021-10-22  9:26 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-21 12:53 [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: fix broken build Matthew Auld
2021-10-21 12:53 ` Matthew Auld
2021-10-21 12:53 ` [Intel-gfx] [PATCH 2/2] drm/i915/dmabuf: drop the flush on discrete Matthew Auld
2021-10-21 12:53   ` Matthew Auld
2021-10-22  9:26   ` Thomas Hellström [this message]
2021-10-22  9:26     ` Thomas Hellström
2021-10-22  9:47     ` [Intel-gfx] " Matthew Auld
2021-10-22  9:47       ` Matthew Auld
2021-10-28 15:31   ` [Intel-gfx] " Daniel Vetter
2021-10-21 14:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/dmabuf: fix broken build Patchwork
2021-10-21 15:18 ` [Intel-gfx] [PATCH 1/2] " Dixit, Ashutosh
2021-10-21 15:18   ` Dixit, Ashutosh
2021-10-21 15:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2021-10-21 18:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-10-27  7:57 ` [Intel-gfx] [PATCH 1/2] " Matthew Auld
2021-10-27  7:57   ` Matthew Auld
2021-10-27  8:58   ` [Intel-gfx] " Jani Nikula
2021-10-27  8:58     ` Jani Nikula
2021-10-27  9:00     ` [Intel-gfx] " Jani Nikula
2021-10-27  9:00       ` Jani Nikula
2021-10-27  9:03     ` [Intel-gfx] " Matthew Auld
2021-10-27  9:03       ` Matthew Auld
2021-10-27  9:44       ` [Intel-gfx] " Jani Nikula
2021-10-27  9:44         ` Jani Nikula
2021-10-27  9:48         ` [Intel-gfx] " Matthew Auld
2021-10-27  9:48           ` Matthew Auld
2021-10-28  1:43           ` [Intel-gfx] " Vivi, Rodrigo
2021-10-28  1:43             ` Vivi, Rodrigo
2021-10-28  8:48             ` [Intel-gfx] " Matthew Auld
2021-10-28  8:48               ` Matthew Auld
2021-11-22 13:34               ` [Intel-gfx] " Tvrtko Ursulin
2021-11-22 13:34                 ` Tvrtko Ursulin
2021-10-27 14:54   ` [Intel-gfx] " Lucas De Marchi
2021-10-27 14:54     ` Lucas De Marchi
2021-10-27 16:23     ` [Intel-gfx] " Matthew Auld
2021-10-27 16:23       ` Matthew Auld
2021-10-27 17:16       ` [Intel-gfx] " Lucas De Marchi
2021-10-27 17:16         ` Lucas De Marchi

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