From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D06DBC4741F for ; Mon, 28 Sep 2020 12:28:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7FA3D22204 for ; Mon, 28 Sep 2020 12:28:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="e9imC3OX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726291AbgI1M26 (ORCPT ); Mon, 28 Sep 2020 08:28:58 -0400 Received: from z5.mailgun.us ([104.130.96.5]:10212 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726328AbgI1M25 (ORCPT ); Mon, 28 Sep 2020 08:28:57 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1601296137; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=xdne3b42R19CBmmD1o/ATM9Y99s0hNLFfkiTn9N47ps=; b=e9imC3OXTI0vMl2fIhYoSQeyObi4faFdHzqtaNoia3/HZYJ+wdEymuse3LXtRGgnw6hrIai+ R3b0tnCH0ewIe6vqRo6vx8cul1bgGRKbAjaqJB8KU/fQFMn4DwiiOK9sjH5xRkUjdMyA5uef BRhIAw27K5ECiznOJMgK+nXBf6Q= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-west-2.postgun.com with SMTP id 5f71d70883f5ac99dbfb17c7 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 28 Sep 2020 12:28:56 GMT Sender: saiprakash.ranjan=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id B2021C43387; Mon, 28 Sep 2020 12:28:56 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id C9D21C433C8; Mon, 28 Sep 2020 12:28:55 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 28 Sep 2020 17:58:55 +0530 From: Sai Prakash Ranjan To: Robin Murphy Cc: Will Deacon , Joerg Roedel , Jordan Crouse , Rob Clark , iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Akhil P Oommen , Bjorn Andersson , freedreno@lists.freedesktop.org, "Kristian H . Kristensen" , dri-devel@lists.freedesktop.org Subject: Re: [PATCHv5 5/6] iommu: arm-smmu-impl: Use table to list QCOM implementations In-Reply-To: References: Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2020-09-23 20:54, Robin Murphy wrote: > On 2020-09-22 07:18, Sai Prakash Ranjan wrote: >> Use table and of_match_node() to match qcom implementation >> instead of multiple of_device_compatible() calls for each >> QCOM SMMU implementation. >> >> Signed-off-by: Sai Prakash Ranjan >> --- >> drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 12 ++++++++---- >> 1 file changed, 8 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> index d199b4bff15d..ce78295cfa78 100644 >> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> @@ -9,6 +9,13 @@ >> #include "arm-smmu.h" >> +static const struct of_device_id __maybe_unused >> qcom_smmu_impl_of_match[] = { >> + { .compatible = "qcom,sc7180-smmu-500" }, >> + { .compatible = "qcom,sdm845-smmu-500" }, >> + { .compatible = "qcom,sm8150-smmu-500" }, >> + { .compatible = "qcom,sm8250-smmu-500" }, >> + { } >> +}; > > Can you push the table itself into arm-smmu-qcom? That way you'll be > free to add new SoCs willy-nilly without any possibility of > conflicting with anything else. > > Bonus points if you can fold in the Adreno variant and keep everything > together ;) > Sure I can get bonus points :) Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17F07C4727F for ; Mon, 28 Sep 2020 12:29:02 +0000 (UTC) Received: from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7D6A3207E8 for ; Mon, 28 Sep 2020 12:29:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="e9imC3OX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7D6A3207E8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by hemlock.osuosl.org (Postfix) with ESMTP id 10A7E87030; Mon, 28 Sep 2020 12:29:01 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from hemlock.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id r4TYe29vrGI8; Mon, 28 Sep 2020 12:29:00 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by hemlock.osuosl.org (Postfix) with ESMTP id 94EF087017; Mon, 28 Sep 2020 12:29:00 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 75760C0889; Mon, 28 Sep 2020 12:29:00 +0000 (UTC) Received: from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137]) by lists.linuxfoundation.org (Postfix) with ESMTP id CB9E9C0051 for ; Mon, 28 Sep 2020 12:28:58 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by fraxinus.osuosl.org (Postfix) with ESMTP id 756DA851FB for ; Mon, 28 Sep 2020 12:28:58 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from fraxinus.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id X5iql-bJkrIo for ; Mon, 28 Sep 2020 12:28:57 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from z5.mailgun.us (z5.mailgun.us [104.130.96.5]) by fraxinus.osuosl.org (Postfix) with ESMTPS id 9489E847D5 for ; Mon, 28 Sep 2020 12:28:57 +0000 (UTC) DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1601296137; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=xdne3b42R19CBmmD1o/ATM9Y99s0hNLFfkiTn9N47ps=; b=e9imC3OXTI0vMl2fIhYoSQeyObi4faFdHzqtaNoia3/HZYJ+wdEymuse3LXtRGgnw6hrIai+ R3b0tnCH0ewIe6vqRo6vx8cul1bgGRKbAjaqJB8KU/fQFMn4DwiiOK9sjH5xRkUjdMyA5uef BRhIAw27K5ECiznOJMgK+nXBf6Q= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI3NDkwMCIsICJpb21tdUBsaXN0cy5saW51eC1mb3VuZGF0aW9uLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-west-2.postgun.com with SMTP id 5f71d70883f5ac99dbfb17a6 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 28 Sep 2020 12:28:56 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id AC8E9C433FF; Mon, 28 Sep 2020 12:28:56 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id C9D21C433C8; Mon, 28 Sep 2020 12:28:55 +0000 (UTC) MIME-Version: 1.0 Date: Mon, 28 Sep 2020 17:58:55 +0530 From: Sai Prakash Ranjan To: Robin Murphy Subject: Re: [PATCHv5 5/6] iommu: arm-smmu-impl: Use table to list QCOM implementations In-Reply-To: References: Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Akhil P Oommen , dri-devel@lists.freedesktop.org, "Kristian H . Kristensen" , Will Deacon , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On 2020-09-23 20:54, Robin Murphy wrote: > On 2020-09-22 07:18, Sai Prakash Ranjan wrote: >> Use table and of_match_node() to match qcom implementation >> instead of multiple of_device_compatible() calls for each >> QCOM SMMU implementation. >> >> Signed-off-by: Sai Prakash Ranjan >> --- >> drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 12 ++++++++---- >> 1 file changed, 8 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> index d199b4bff15d..ce78295cfa78 100644 >> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> @@ -9,6 +9,13 @@ >> #include "arm-smmu.h" >> +static const struct of_device_id __maybe_unused >> qcom_smmu_impl_of_match[] = { >> + { .compatible = "qcom,sc7180-smmu-500" }, >> + { .compatible = "qcom,sdm845-smmu-500" }, >> + { .compatible = "qcom,sm8150-smmu-500" }, >> + { .compatible = "qcom,sm8250-smmu-500" }, >> + { } >> +}; > > Can you push the table itself into arm-smmu-qcom? That way you'll be > free to add new SoCs willy-nilly without any possibility of > conflicting with anything else. > > Bonus points if you can fold in the Adreno variant and keep everything > together ;) > Sure I can get bonus points :) Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8B07C2D0A8 for ; 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Mon, 28 Sep 2020 12:28:55 +0000 (UTC) MIME-Version: 1.0 Date: Mon, 28 Sep 2020 17:58:55 +0530 From: Sai Prakash Ranjan To: Robin Murphy Subject: Re: [PATCHv5 5/6] iommu: arm-smmu-impl: Use table to list QCOM implementations In-Reply-To: References: Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200928_082906_731798_728F1540 X-CRM114-Status: GOOD ( 17.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Joerg Roedel , Jordan Crouse , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Rob Clark , Akhil P Oommen , dri-devel@lists.freedesktop.org, "Kristian H . Kristensen" , Bjorn Andersson , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-09-23 20:54, Robin Murphy wrote: > On 2020-09-22 07:18, Sai Prakash Ranjan wrote: >> Use table and of_match_node() to match qcom implementation >> instead of multiple of_device_compatible() calls for each >> QCOM SMMU implementation. >> >> Signed-off-by: Sai Prakash Ranjan >> --- >> drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 12 ++++++++---- >> 1 file changed, 8 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> index d199b4bff15d..ce78295cfa78 100644 >> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> @@ -9,6 +9,13 @@ >> #include "arm-smmu.h" >> +static const struct of_device_id __maybe_unused >> qcom_smmu_impl_of_match[] = { >> + { .compatible = "qcom,sc7180-smmu-500" }, >> + { .compatible = "qcom,sdm845-smmu-500" }, >> + { .compatible = "qcom,sm8150-smmu-500" }, >> + { .compatible = "qcom,sm8250-smmu-500" }, >> + { } >> +}; > > Can you push the table itself into arm-smmu-qcom? That way you'll be > free to add new SoCs willy-nilly without any possibility of > conflicting with anything else. > > Bonus points if you can fold in the Adreno variant and keep everything > together ;) > Sure I can get bonus points :) Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6E7FC4727F for ; Tue, 29 Sep 2020 07:13:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 778B32083B for ; Tue, 29 Sep 2020 07:13:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="e9imC3OX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 778B32083B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1740289F6F; Tue, 29 Sep 2020 07:13:23 +0000 (UTC) Received: from z5.mailgun.us (z5.mailgun.us [104.130.96.5]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0D99889A4A for ; Mon, 28 Sep 2020 12:28:57 +0000 (UTC) DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1601296137; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=xdne3b42R19CBmmD1o/ATM9Y99s0hNLFfkiTn9N47ps=; b=e9imC3OXTI0vMl2fIhYoSQeyObi4faFdHzqtaNoia3/HZYJ+wdEymuse3LXtRGgnw6hrIai+ R3b0tnCH0ewIe6vqRo6vx8cul1bgGRKbAjaqJB8KU/fQFMn4DwiiOK9sjH5xRkUjdMyA5uef BRhIAw27K5ECiznOJMgK+nXBf6Q= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyJkOTU5ZSIsICJkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-west-2.postgun.com with SMTP id 5f71d708bebf546dbbd6afc7 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 28 Sep 2020 12:28:56 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id CE512C4339C; Mon, 28 Sep 2020 12:28:56 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id C9D21C433C8; Mon, 28 Sep 2020 12:28:55 +0000 (UTC) MIME-Version: 1.0 Date: Mon, 28 Sep 2020 17:58:55 +0530 From: Sai Prakash Ranjan To: Robin Murphy Subject: Re: [PATCHv5 5/6] iommu: arm-smmu-impl: Use table to list QCOM implementations In-Reply-To: References: Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-Mailman-Approved-At: Tue, 29 Sep 2020 07:12:58 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Joerg Roedel , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Akhil P Oommen , dri-devel@lists.freedesktop.org, "Kristian H . Kristensen" , Bjorn Andersson , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 2020-09-23 20:54, Robin Murphy wrote: > On 2020-09-22 07:18, Sai Prakash Ranjan wrote: >> Use table and of_match_node() to match qcom implementation >> instead of multiple of_device_compatible() calls for each >> QCOM SMMU implementation. >> >> Signed-off-by: Sai Prakash Ranjan >> --- >> drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 12 ++++++++---- >> 1 file changed, 8 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> index d199b4bff15d..ce78295cfa78 100644 >> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c >> @@ -9,6 +9,13 @@ >> #include "arm-smmu.h" >> +static const struct of_device_id __maybe_unused >> qcom_smmu_impl_of_match[] = { >> + { .compatible = "qcom,sc7180-smmu-500" }, >> + { .compatible = "qcom,sdm845-smmu-500" }, >> + { .compatible = "qcom,sm8150-smmu-500" }, >> + { .compatible = "qcom,sm8250-smmu-500" }, >> + { } >> +}; > > Can you push the table itself into arm-smmu-qcom? That way you'll be > free to add new SoCs willy-nilly without any possibility of > conflicting with anything else. > > Bonus points if you can fold in the Adreno variant and keep everything > together ;) > Sure I can get bonus points :) Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel