Re: [PATCH i-g-t 2/2] tests/intel: Add mode-rejected-max-dotclock subtest to kms_cdclk

["Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com>]

On 8/19/2026 1:08 PM, Swati Sharma wrote:
> Add a subtest that verifies the driver rejects a modeset when the
> requested pixel clock exceeds the platform's maximum dotclock
> capability. The test reads the max dotclock from debugfs via
> igt_get_max_dotclock(), sets the mode clock 50 MHz above, and
> asserts the atomic commit fails.
> 
> Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
> Assisted-by: GitHub Copilot:Claude Opus 4.6
> ---
>   tests/intel/kms_cdclk.c | 64 +++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 64 insertions(+)
> 
> diff --git a/tests/intel/kms_cdclk.c b/tests/intel/kms_cdclk.c
> index 070fba400..33007f6b3 100644
> --- a/tests/intel/kms_cdclk.c
> +++ b/tests/intel/kms_cdclk.c
> @@ -44,6 +44,10 @@
>    *
>    * SUBTEST: plane-scaling
>    * Description: Plane scaling test to validate cdclk frequency change.
> + *
> + * SUBTEST: mode-rejected-max-dotclock
> + * Description: Verify that a mode exceeding the maximum pixel clock
> + *              frequency is rejected by the driver.
>    */
>   
>   IGT_TEST_DESCRIPTION("Test cdclk features : crawling and squashing");
> @@ -354,6 +358,62 @@ static void run_cdclk_test(data_t *data, uint32_t flags)
>   	}
>   }
>   
> +static void test_mode_rejected_max_dotclock(data_t *data)
> +{
> +	igt_display_t *display = &data->display;
> +	igt_output_t *output;
> +	igt_crtc_t *crtc;
> +	int max_dotclock, ret;
> +	struct igt_fb fb;
> +
> +	max_dotclock = igt_get_max_dotclock(data->drm_fd);
> +	igt_require_f(max_dotclock > 0,
> +		      "Could not read max pixel clock\n");
> +
> +	for_each_crtc_with_valid_output(display, crtc, output) {
> +		drmModeModeInfo mode = *igt_output_get_mode(output);
> +
> +		igt_output_set_crtc(output, crtc);
> +		if (!intel_pipe_output_combo_valid(display)) {
> +			igt_output_set_crtc(output, NULL);
> +			continue;
> +		}
> +
> +		/* Set clock above PHY max */
> +		mode.clock = max_dotclock + 50000;
> +
> +		igt_display_reset(display);

We need a do_cleanup_display() like all other tests in this file. Given 
that every test in this file (including the new one) skips its own 
end-of-test cleanup when its assertion fails, a prior failing subtest 
can leave hardware in a unwanted committed state.

> +		igt_output_set_crtc(output, crtc);
> +		igt_output_override_mode(output, &mode);
> +
> +		igt_create_pattern_fb(data->drm_fd,
> +				      mode.hdisplay, mode.vdisplay,
> +				      DRM_FORMAT_XRGB8888,
> +				      DRM_FORMAT_MOD_LINEAR, &fb);
> +		igt_plane_set_fb(igt_output_get_plane_type(output,
> +				 DRM_PLANE_TYPE_PRIMARY), &fb);

Let's cache the primary plane instead of calling 
igt_output_get_plane_type() multiple times.

With these, LGTM

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

> +
> +		ret = igt_display_try_commit_atomic(display,
> +						    DRM_MODE_ATOMIC_ALLOW_MODESET,
> +						    NULL);
> +
> +		igt_info("Output %s: clock=%dkHz (max=%dkHz) -> %s\n",
> +			 output->name, mode.clock, max_dotclock,
> +			 ret ? "rejected" : "accepted");
> +
> +		igt_assert_f(ret != 0,
> +			     "Mode with clock=%dkHz exceeding max=%dkHz "
> +			     "should be rejected on %s\n",
> +			     mode.clock, max_dotclock, output->name);
> +
> +		igt_plane_set_fb(igt_output_get_plane_type(output,
> +				 DRM_PLANE_TYPE_PRIMARY), NULL);
> +		igt_output_set_crtc(output, NULL);
> +		igt_remove_fb(data->drm_fd, &fb);
> +		break;
> +	}
> +}
> +
>   int igt_main()
>   {
>   	data_t data = {};
> @@ -384,6 +444,10 @@ int igt_main()
>   	igt_subtest("mode-transition-all-outputs")
>   		test_mode_transition_on_all_outputs(&data);
>   
> +	igt_describe("Verify that a mode exceeding max pixel clock is rejected.");
> +	igt_subtest("mode-rejected-max-dotclock")
> +		test_mode_rejected_max_dotclock(&data);
> +
>   	igt_fixture() {
>   		igt_display_fini(&data.display);
>   		drm_close_driver(data.drm_fd);