From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9EC45E68961 for ; Thu, 31 Oct 2024 09:08:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Pw+x48pnfLzdgml028gQLcQYntFplT5q/PBhAfq+CoM=; b=J++cCVRi4A7D1CRMg80gX7ckzN 3Y+de+kGWVGBgaUFQtsepke6VsVpWEB25A8QjA9eSRs8qxaN2NHkmG05vPDtbCpa4ood225t3FMAV NIZ723zJfgGY765zzouF/aQvhJYq0UZ40yBQEqGLlxmifYH8NxTT8hADY4N5rozG9Cyymgqptdc/b Q+ef6IPVyKHljullPxX6gKMv9CelJWgc0f/VHRbinTlp8PvBrTObHPkdwrsof2ASBUa09r0CugbIk tVzSJpcKzGK3kQy6Nu7bQb8EWzkF/U5FLudk3MttY9WAcaTHpHIlI9P3O/Mupx3VOEA6cWxN+MFw3 zNWPAR7g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t6RAU-000000031nW-2tgO; Thu, 31 Oct 2024 09:08:38 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t6R8q-000000031ZX-0MVC for linux-arm-kernel@lists.infradead.org; Thu, 31 Oct 2024 09:06:57 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 9E1EDA40209; Thu, 31 Oct 2024 09:04:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 67AC9C4CEC3; Thu, 31 Oct 2024 09:06:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730365615; bh=jRK9phKHkchO0mnknTshDeyU8PEHorjApsaAP1BtGM8=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=WsngxzJC4E1+qV9IM631Ja9WXQOHWGKm2xL8Rp6W52SS963iSAacmobvKtFsy9Zm1 L8gfMhAMdZqkInyy8xdsDvI6Ivof++6lcv7y2rbFWTVKsWW1hCqyi2lp/5Tip/wYkq AUKTb++jTVCPBfnk0DW1A6yhMSBx0HtKLAbRUvQ9WPE8s63xn0qmcmGzp96/DemFGI wWxGFXs1pWgBAvt0sZfQZhsP5j5TZY/5x1lXfCsILvdQpI/cyqKbZJUWkYc/PSnzDS 6c+KaMDXBzphi1Xi33xXbVkCVjfW2cOQfLLKtuC8nWM6SzcuZy4JAONzh9Ne+pYmOP 5PyVpooPRm6lQ== Message-ID: Date: Thu, 31 Oct 2024 11:06:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: BeagleBone Black Ethernet PHY issues To: Geert Uytterhoeven Cc: ext Tony Lindgren , Siddharth Vadapalli , "open list:TI ETHERNET SWITCH DRIVER (CPSW)" , netdev , Matti Vaittinen , Linux ARM References: <1f927944-30aa-4298-9bd0-d9d3ace3fc78@kernel.org> Content-Language: en-US From: Roger Quadros In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241031_020656_275213_83292270 X-CRM114-Status: GOOD ( 21.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 30/10/2024 17:08, Geert Uytterhoeven wrote: > Hi Roger, > > On Wed, Oct 30, 2024 at 1:58 PM Roger Quadros wrote: >> On 29/10/2024 19:18, Geert Uytterhoeven wrote: >>> During the last few months, booting kernels on BeagleBone Black >>> sometimes fails with: >>> >>> +SMSC LAN8710/LAN8720 4a101000.mdio:00: probe with driver SMSC >>> LAN8710/LAN8720 failed with error -5 > > [...] > >> Just wondering if the Reset is happening correctly and it has settled >> before PHY access. >> >> From arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi >> >> &davinci_mdio_sw { >> pinctrl-names = "default", "sleep"; >> pinctrl-0 = <&davinci_mdio_default>; >> pinctrl-1 = <&davinci_mdio_sleep>; >> >> ethphy0: ethernet-phy@0 { >> reg = <0>; >> /* Support GPIO reset on revision C3 boards */ >> reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; >> reset-assert-us = <300>; >> reset-deassert-us = <13000>; >> }; >> }; >> >> Do we need to increase reset-deassert-us for some reason? > > Thanks for the hint! > > This is indeed on Rev. C3 (my other boards are Rev. A5C or C, but > I don't test boot recent kernels on them, as they are in active use). > > Multiplying reset-deassert-us by 10 gives me a booting board. > More experiments reveal that I need a delay of 14 ms to boot > successfully, and 15 ms to avoid the early __mdiobus_read() > failure, too. > >> I couldn't find MII ready time after reset de-assert information form the >> PHY datasheet. except the following line [1]. >> "For the first 16us after coming out of reset, the MII/RMII interface will run at 2.5 MHz. After this time, it will >> switch to 25 MHz if auto-negotiation is enabled" >> >> [1] 3.8.5 RESETS >> https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DataSheets/LAN8710A-LAN8710Ai-Data-Sheet-DS00002164.pdf > > 3.8.5.1 Hardware Reset > "A Hardware reset is asserted by driving the nRST input pin low. When > driven, nRST should be held low for the minimum time detailed in > Section 5.6.3, "Power-On nRST & Configuration Strap Timing," on page > 60 to ensure a proper transceiver reset." > > 5.6.3 POWER-ON NRST & CONFIGURATION STRAP TIMING > "For proper operation, nRST must be asserted for no less than trstia." > > TABLE 5-8: POWER-ON NRST & CONFIGURATION STRAP TIMING VALUES > "trstia nRST input assertion time min. 100 µS" > > On Rev. C3, ETH_RESETn is controlled by an open-drain AND gate. > It is pulled high by a 10K resistor, and has a 4.7µF capacitor to > ground. That gives an RC constant of 47ms. As you need 0.7RC to charge > the capacitor above the threshold voltage of a CMOS input (VDD/2), > reset-deassert-us should be at least 33ms. Considering the typical > tolerance of 20% on capacitors, 40ms would be safer. Or perhaps > even 50ms? Super! Yes, I agree 50ms would be a good setting. > > If you agree, I can send a patch. > Thanks! Much appreciated, thanks! -- cheers, -roger