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([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-33281ad09e9sm7449301fa.63.2025.08.07.00.14.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 07 Aug 2025 00:14:08 -0700 (PDT) Message-ID: Date: Thu, 7 Aug 2025 10:14:07 +0300 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/8] dt-bindings: iio: adc: ad7476: Add ROHM bd79105 To: David Lechner , Matti Vaittinen Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <3066337cb183afa5f53a4e6cf94ce15a36d14ec8.1754463393.git.mazziesaccount@gmail.com> Content-Language: en-US, en-AU, en-GB, en-BW From: Matti Vaittinen In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 06/08/2025 18:15, David Lechner wrote: > On 8/6/25 2:04 AM, Matti Vaittinen wrote: >> The ROHM BD79105 is a simple, 16-bit, 1-channel ADC with a 'CONVSTART' >> pin used to start the ADC conversion. Other than the 'CONVSTART', there >> are 3 supply pins (one used as a reference), analog inputs, ground and >> communication pins. It's worth noting that the pin somewhat confusingly >> labeled as 'DIN', is a pin which should be used as a chip-select. The IC >> does not have any writable registers. >> >> The device is designed so that the output pin can, in addition to >> outputting the data, be used as a 'data-ready'-IRQ. This, however, would >> require the IRQ to be masked from host side for the duration of the data >> reads - and it wouldn't also work when the SPI is shared. (As access to >> the other SPI devices would cause data line changes to be detected as >> IRQs - and the BD79105 provides no means to detect if it has generated >> an IRQ). >> >> Hence the device-tree does not contain any IRQ properties. > > There are lots of other ADC chips that have a ready signal like this > and we've made them work. Ah. I had no idea. Thanks for the insight! > Since devicetree bindings should be as > complete as possible even if the driver doesn't use all of the > features, I think we should be including the interrupt in the binding. After what you wrote above, I do agree. There may be systems where the IRQ is usable, so dt should have it even if the Linux driver never used it. > We have also found that some interrupt controllers won't work > as you have suggested and in that case we also needed a ready-gpios > to be able to read the state of the pin. Oh. My thinking was just hard-coding the conversion-time delay, but this can indeed make sense - especially if there are other examples :) Thanks a lot for the insight! Yours, -- Matti