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Date:	Thu, 26 Jan 2006 09:47:51 +0100
From:	Franck <vagabon.xyz@gmail.com>
To:	"Kevin D. Kissell" <kevink@mips.com>
Subject: Re: [RFC] Optimize swab operations on mips_r2 cpu
Cc:	Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
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2006/1/26, Kevin D. Kissell <kevink@mips.com>:
> Franck wrote:
> > Let's say that the 4KSC has "wsbh" instruction which is part of
> > MIPS32R2 instructrion set (I haven't checked it). The question is how
> > the 4KSC would use the SWAB optimizations since it doesn't define
> > CONFIG_CPU_MIPS32_R2  ? The 4KSC might not be the only one case...
>
> The 4KSc happens not to have the MIPS32R2 WSBH (is that pronounced
> "wasabi"? ;o) instruction, but it does have the MIPS32R2 ROTR, because
> it's part of the SmartMIPS ASE.  Our options here include:
>
> * Say "to heck with it" and deny the 4KSc use of the ROTR, and stay
>    with a "#ifdef CONFIG_CPU_MIPS32R2" conditional.
>
> * Define CONFIG_CPU_MIPS4KSC as an additional oddball CPU flag, and
>    make it "#if defined(CONFIG_CPU_MIPS32R2) || defined(CONFIG_CPU_MIPS4KSC)
>
> * Have an ASE-support flag, CONFIG_CPU_SMARTMIPS, which would cover both
>    the 4KSc and 4KSd.  In that case code using ROTR could be conditional on
>    #if defined(CPU_CONFIG_MIPS32R2) || defined(CONFIG_CPU_SMARTMIPS).
>
> I personally think that the third option is the cleanest and most conceptually
> correct, but I'm not the guy operationally responsible for maintaining
> that code.
>

I think we will have to use second _and_ third options. I can't find
out an example, but since 4KSC has some MIPS32_R2 instructions it will
need to use some specific MIPS32_R2 code sometimes.

Anyways I'm going to send to Ralf a new patch for swab optimizations.

Thanks
--
               Franck