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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEwMDEyOSBTYWx0ZWRfX+O9Korjvc9O6 NWbhhQF1XxpD5thjkvw60p+mFcpyMD5KXXYz/Ww2O0BB5bija63IDhwyOFTotactQnRicjx+82Z BQMzeExkKOO9TG7D7zNn205X1w+ycd+E3Mrf3nwjNBqhYc5On3L1NxfGt2BLWPwvS1t5WoIt8Rb aNbKjEeQdy0UXx+fbhPds4YKu33teGRBwCRzzX81Vv5+v/JSel/91gJaGMt3LabUZyFq7R6oUiK S8YYZ1qGuGESt4yDwJxs2bVCOwIpjyMRH9C2ofkN15tT8boOaiZnE4ZQRz5/7g4e4SG6cUy4FgH mYjuydeBqykEq8eP9c1H/5HWOYD3j91E0y1NYEzEB84ni2sUQgvGUUZ7RkmNPi0f+g7HZ3Ujj9v Wuf8UaZZRdgQHWQ2D/R5TATxIpVNdthBKCu3ZyVcjdkZK06t3AxlmWj1HSN3YQ3sVEO5mk2P+jr IOv42JUbgX5NWhrWUNQ== X-Authority-Analysis: v=2.4 cv=WpIb99fv c=1 sm=1 tr=0 ts=6a50ee49 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=D08nViSs8J4lS6wn26kA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-GUID: eY6eEJ5aCFU1HIym_6nJKjNGiVAyZmG0 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEwMDEyOSBTYWx0ZWRfX7quxC9t0k932 q2XSCeXG7mUgg96RHXgZxQMkOxajzV8jSF1oFxQZ0IvECMnEVe883vafJV1ipGC3o+L0e4jLPNc heJEvpP3DoGvzyfjvLqqv0CbWo1SYdY= X-Proofpoint-ORIG-GUID: eY6eEJ5aCFU1HIym_6nJKjNGiVAyZmG0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-10_03,2026-07-09_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 phishscore=0 spamscore=0 bulkscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607100129 Hi Dmitry, On 7/10/2026 6:19 PM, Dmitry Baryshkov wrote: > On Mon, Jul 06, 2026 at 11:34:42AM +0530, Nabige Aala wrote: >> From: Arpit Saini >> >> Enable the Qualcomm Shikra MDSS display subsystem on the Shikra CQM EVK >> board and add the DLC0697 MIPI DSI display panel node. Pin pm4125_l5 >> to 1.232V with regulator-allow-set-load for DSI PHY PLL stability. >> >> Signed-off-by: Arpit Saini >> Signed-off-by: Nabige Aala >> --- >> arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 126 ++++++++++++++++++++++++++++ >> 1 file changed, 126 insertions(+) >> + >> + panel_bl_en: panel-bl-en-state { >> + pins = "gpio91"; >> + function = "gpio"; >> + drive-strength = <2>; >> + bias-disable; >> + output-high; >> + }; >> + >> + panel_bl_en_suspend: panel-bl-en-suspend-state { >> + pins = "gpio91"; >> + function = "gpio"; >> + drive-strength = <2>; >> + bias-pull-down; >> + output-low; >> + }; > Is it an actual GPIO going to the panel or is it a regulator on one of > the daughter / whatever cards? This GPIO is part of the daughter card, it is not going to the panel. >