From: Dave Jiang <dave.jiang@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>, djbw@kernel.org
Cc: jic23@kernel.org, benjamin.cheatham@amd.com, icheng@nvidia.com,
alucerop@amd.com, alison.schofield@intel.com, gourry@gourry.net,
dongjoo.seo1@samsung.com, linux-cxl@vger.kernel.org
Subject: Re: [PATCH v5 5/5] cxl/hdm: Rename decoder coherency flags
Date: Wed, 1 Jul 2026 11:12:12 -0700 [thread overview]
Message-ID: <ceb03250-79c6-4f94-b37c-ef1d6818c163@intel.com> (raw)
In-Reply-To: <20260615145529.13848-6-dave@stgolabs.net>
On 6/15/26 7:55 AM, Davidlohr Bueso wrote:
> Align with the ACPI CXL Window restriction naming and convert
> CXL_DECODER_F_TYPE2/F_TYPE3 to F_DEVMEM/F_HOSTONLY. Type2 and
> Type3 coherency models were named prior to Back-Invalidate.
>
> Reviewed-by: Ben Cheatham <benjamin.cheatham@amd.com>
> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
> drivers/cxl/acpi.c | 6 +++---
> drivers/cxl/core/port.c | 12 ++++++------
> drivers/cxl/cxl.h | 4 ++--
> 3 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index 6a9ba82719e9..087dd1e86d40 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -143,9 +143,9 @@ static unsigned long cfmws_to_decoder_flags(int restrictions)
> unsigned long flags = CXL_DECODER_F_ENABLE;
>
> if (restrictions & ACPI_CEDT_CFMWS_RESTRICT_DEVMEM)
> - flags |= CXL_DECODER_F_TYPE2;
> + flags |= CXL_DECODER_F_DEVMEM;
> if (restrictions & ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM)
> - flags |= CXL_DECODER_F_TYPE3;
> + flags |= CXL_DECODER_F_HOSTONLY;
> if (restrictions & ACPI_CEDT_CFMWS_RESTRICT_VOLATILE)
> flags |= CXL_DECODER_F_RAM;
> if (restrictions & ACPI_CEDT_CFMWS_RESTRICT_PMEM)
> @@ -445,7 +445,7 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
>
> cxld = &cxlrd->cxlsd.cxld;
> cxld->flags = cfmws_to_decoder_flags(cfmws->restrictions);
> - cxld->target_type = (cxld->flags & CXL_DECODER_F_TYPE2) ?
> + cxld->target_type = (cxld->flags & CXL_DECODER_F_DEVMEM) ?
> CXL_DECODER_DEVMEM : CXL_DECODER_HOSTONLYMEM;
> cxld->hpa_range = (struct range) {
> .start = cfmws->base_hpa,
> diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> index 71801dfd614b..63005cf0fa91 100644
> --- a/drivers/cxl/core/port.c
> +++ b/drivers/cxl/core/port.c
> @@ -128,8 +128,8 @@ static DEVICE_ATTR_RO(name)
>
> CXL_DECODER_FLAG_ATTR(cap_pmem, CXL_DECODER_F_PMEM);
> CXL_DECODER_FLAG_ATTR(cap_ram, CXL_DECODER_F_RAM);
> -CXL_DECODER_FLAG_ATTR(cap_type2, CXL_DECODER_F_TYPE2);
> -CXL_DECODER_FLAG_ATTR(cap_type3, CXL_DECODER_F_TYPE3);
> +CXL_DECODER_FLAG_ATTR(cap_type2, CXL_DECODER_F_DEVMEM);
> +CXL_DECODER_FLAG_ATTR(cap_type3, CXL_DECODER_F_HOSTONLY);
> CXL_DECODER_FLAG_ATTR(locked, CXL_DECODER_F_LOCK);
> CXL_DECODER_FLAG_ATTR(cap_bi, CXL_DECODER_F_BI);
>
> @@ -357,8 +357,8 @@ static bool can_create_pmem(struct cxl_root_decoder *cxlrd)
> unsigned long flags = cxlrd->cxlsd.cxld.flags;
> unsigned long hdm_h, hdm_db;
>
> - hdm_h = CXL_DECODER_F_TYPE3 | CXL_DECODER_F_PMEM;
> - hdm_db = CXL_DECODER_F_TYPE2 | CXL_DECODER_F_BI | CXL_DECODER_F_PMEM;
> + hdm_h = CXL_DECODER_F_HOSTONLY | CXL_DECODER_F_PMEM;
> + hdm_db = CXL_DECODER_F_DEVMEM | CXL_DECODER_F_BI | CXL_DECODER_F_PMEM;
>
> return (flags & hdm_h) == hdm_h || (flags & hdm_db) == hdm_db;
> }
> @@ -368,8 +368,8 @@ static bool can_create_ram(struct cxl_root_decoder *cxlrd)
> unsigned long flags = cxlrd->cxlsd.cxld.flags;
> unsigned long hdm_h, hdm_db;
>
> - hdm_h = CXL_DECODER_F_TYPE3 | CXL_DECODER_F_RAM;
> - hdm_db = CXL_DECODER_F_TYPE2 | CXL_DECODER_F_BI | CXL_DECODER_F_RAM;
> + hdm_h = CXL_DECODER_F_HOSTONLY | CXL_DECODER_F_RAM;
> + hdm_db = CXL_DECODER_F_DEVMEM | CXL_DECODER_F_BI | CXL_DECODER_F_RAM;
>
> return (flags & hdm_h) == hdm_h || (flags & hdm_db) == hdm_db;
> }
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 29231d0db470..b0b4ea4ff8a5 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -282,8 +282,8 @@ int cxl_dport_map_rcd_linkcap(struct pci_dev *pdev, struct cxl_dport *dport);
> */
> #define CXL_DECODER_F_RAM BIT(0)
> #define CXL_DECODER_F_PMEM BIT(1)
> -#define CXL_DECODER_F_TYPE2 BIT(2)
> -#define CXL_DECODER_F_TYPE3 BIT(3)
> +#define CXL_DECODER_F_DEVMEM BIT(2)
> +#define CXL_DECODER_F_HOSTONLY BIT(3)
> #define CXL_DECODER_F_LOCK BIT(4)
> #define CXL_DECODER_F_ENABLE BIT(5)
> #define CXL_DECODER_F_NORMALIZED_ADDRESSING BIT(6)
prev parent reply other threads:[~2026-07-01 18:12 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-15 14:55 [PATCH v5 0/5] cxl: Support Back-Invalidate Davidlohr Bueso
2026-06-15 14:55 ` [PATCH v5 1/5] cxl: Add BI register probing and port initialization Davidlohr Bueso
2026-06-15 17:35 ` sashiko-bot
2026-06-23 8:02 ` Richard Cheng
2026-06-29 14:44 ` Davidlohr Bueso
2026-07-01 16:57 ` Dave Jiang
2026-06-15 14:55 ` [PATCH v5 2/5] cxl/pci: Add BI topology enable/disable Davidlohr Bueso
2026-06-15 17:34 ` sashiko-bot
2026-06-23 8:24 ` Richard Cheng
2026-06-29 15:08 ` Davidlohr Bueso
2026-06-15 14:55 ` [PATCH v5 3/5] cxl/hdm: Add BI coherency support for endpoint decoders Davidlohr Bueso
2026-06-15 17:32 ` sashiko-bot
2026-07-01 18:10 ` Dave Jiang
2026-06-15 14:55 ` [PATCH v5 4/5] cxl: Add HDM-DB region creation Davidlohr Bueso
2026-06-15 17:41 ` sashiko-bot
2026-06-23 8:39 ` Richard Cheng
2026-06-23 8:47 ` Richard Cheng
2026-06-29 15:26 ` Davidlohr Bueso
2026-06-15 14:55 ` [PATCH v5 5/5] cxl/hdm: Rename decoder coherency flags Davidlohr Bueso
2026-07-01 18:12 ` Dave Jiang [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ceb03250-79c6-4f94-b37c-ef1d6818c163@intel.com \
--to=dave.jiang@intel.com \
--cc=alison.schofield@intel.com \
--cc=alucerop@amd.com \
--cc=benjamin.cheatham@amd.com \
--cc=dave@stgolabs.net \
--cc=djbw@kernel.org \
--cc=dongjoo.seo1@samsung.com \
--cc=gourry@gourry.net \
--cc=icheng@nvidia.com \
--cc=jic23@kernel.org \
--cc=linux-cxl@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.