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From: Choong Yong Liang <yong.liang.choong@linux.intel.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: Simon Horman <horms@kernel.org>,
	Jose Abreu <joabreu@synopsys.com>,
	Jose Abreu <Jose.Abreu@synopsys.com>,
	David E Box <david.e.box@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H . Peter Anvin" <hpa@zytor.com>,
	Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>,
	David E Box <david.e.box@intel.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S . Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Jiawen Wu <jiawenwu@trustnetic.com>,
	Mengyuan Lou <mengyuanlou@net-swift.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Hans de Goede <hdegoede@redhat.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Serge Semin <fancer.lancer@gmail.com>,
	x86@kernel.org, LKML <linux-kernel@vger.kernel.org>,
	Netdev <netdev@vger.kernel.org>,
	platform-driver-x86@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH net-next v7 4/7] stmmac: intel: configure SerDes according to the interface mode
Date: Fri, 7 Feb 2025 17:53:37 +0800	[thread overview]
Message-ID: <ceb6cee6-9cfb-4363-9d23-dfd21f78d486@linux.intel.com> (raw)
In-Reply-To: <c15078bf-b6f3-5b4b-82ca-668d47168ce0@linux.intel.com>



On 6/2/2025 9:31 pm, Ilpo Järvinen wrote:
>> +static int intel_tsn_lane_is_available(struct net_device *ndev,
>> +				       struct intel_priv_data *intel_priv)
>> +{
>> +	struct stmmac_priv *priv = netdev_priv(ndev);
>> +	struct pmc_ipc_cmd tmp = {};
>> +	u32 rbuf[4] = {};
>> +	int ret = 0, i, j;
>> +	const int max_fia_regs = 5;
>> +
>> +	tmp.cmd = IPC_SOC_REGISTER_ACCESS;
>> +	tmp.sub_cmd = IPC_SOC_SUB_CMD_READ;
>> +
>> +	for (i = 0; i < max_fia_regs; i++) {
> 
> Usually, defines are used for true consts.
> 
Hi Ilpo,
Thank you for your feedback. I used const int max_fia_regs = 5; to leverage 
type safety and scope control in modern C. However, I understand that 
#define is a common practice. Please let me know if you prefer I switch to 
#define for consistency.

>> +static int intel_mac_finish(struct net_device *ndev,
>> +			    void *intel_data,
>> +			    unsigned int mode,
>> +			    phy_interface_t interface)
>> +{
>> +	struct intel_priv_data *intel_priv = intel_data;
>> +	struct stmmac_priv *priv = netdev_priv(ndev);
>> +	const struct pmc_serdes_regs *regs;
>> +	int max_regs = 0;
>> +	int ret = 0;
>> +
>> +	ret = intel_tsn_lane_is_available(ndev, intel_priv);
>> +	if (ret < 0) {
>> +		netdev_info(priv->dev, "No TSN lane available to set the registers.\n");
>> +		return ret;
>> +	}
>> +
>> +	if (interface == PHY_INTERFACE_MODE_2500BASEX) {
>> +		regs = intel_priv->pid_2p5g.regs;
>> +		max_regs = intel_priv->pid_2p5g.num_regs;
>> +	} else {
>> +		regs = intel_priv->pid_1g.regs;
>> +		max_regs = intel_priv->pid_1g.num_regs;
>> +	}
>> +
>> +	ret = intel_set_reg_access(regs, max_regs);
>> +	if (ret < 0)
>> +		return ret;
> 
> This looks much cleaner now, thanks the update.
> 
> However, the intel_priv fields you introduced are not setup until patch
> 6/7? Will this cause NULL ptr deref issues in between the two changes? By
> introducing the reg arrays in this patch but only use them after patch 6,
> you'll also get unused variable warnings out of them in between the
> changes which is unacceptable.
> 
Thank you for pointing out the potential issues with the intel_priv fields. 
I will move the changes from patch 6 into this patch to avoid NULL pointer 
de-reference issues and unused variable warnings. This will ensure 
everything is properly set up and used within the same patch.


  reply	other threads:[~2025-02-07  9:57 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-06 13:18 [PATCH net-next v7 0/7] Enable SGMII and 2500BASEX interface mode switching for Intel platforms Choong Yong Liang
2025-02-06 13:18 ` [PATCH net-next v7 1/7] net: phylink: use pl->link_interface in phylink_expects_phy() Choong Yong Liang
2025-02-06 13:18 ` [PATCH net-next v7 2/7] net: pcs: xpcs: re-initiate clause 37 Auto-negotiation Choong Yong Liang
2025-02-06 15:30   ` Russell King (Oracle)
2025-02-07  9:20     ` Choong Yong Liang
2025-02-07 13:32       ` Andrew Lunn
2025-02-08  3:33         ` Choong Yong Liang
2025-02-20  2:12     ` Choong Yong Liang
2025-02-06 13:18 ` [PATCH net-next v7 3/7] arch: x86: add IPC mailbox accessor function and add SoC register access Choong Yong Liang
2025-02-06 16:46   ` Dave Hansen
2025-02-06 22:48     ` Andrew Lunn
2025-02-19 17:01     ` David E. Box
2025-02-20  2:29       ` Choong Yong Liang
2025-02-06 13:18 ` [PATCH net-next v7 4/7] stmmac: intel: configure SerDes according to the interface mode Choong Yong Liang
2025-02-06 13:31   ` Ilpo Järvinen
2025-02-07  9:53     ` Choong Yong Liang [this message]
2025-02-06 13:18 ` [PATCH net-next v7 5/7] net: stmmac: configure SerDes on mac_finish Choong Yong Liang
2025-02-06 13:18 ` [PATCH net-next v7 6/7] stmmac: intel: interface switching support for EHL platform Choong Yong Liang
2025-02-06 13:18 ` [PATCH net-next v7 7/7] stmmac: intel: interface switching support for ADL-N platform Choong Yong Liang

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