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From: "Christian König" <christian.koenig@amd.com>
To: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>,
	amd-gfx@lists.freedesktop.org
Cc: kernel-dev@igalia.com, "Alex Deucher" <alexander.deucher@amd.com>,
	"Timur Kristóf" <timur.kristof@gmail.com>
Subject: Re: [PATCH 3/3] drm/amdgpu: Simplify amdgpu_ring_init
Date: Tue, 20 Oct 2026 15:55:05 +0200	[thread overview]
Message-ID: <cebd6011-33cf-4513-925f-cb82005009de@amd.com> (raw)
In-Reply-To: <20261020132739.31852-4-tvrtko.ursulin@igalia.com>

On 10/20/26 15:27, Tvrtko Ursulin wrote:
> (Too) many times I grepped the codebase trying to figure out who sets
> adev->gpu_sched[hw_ip][hw_prio].num_scheds and this time I decided to make
> this greppable by avoding the fun pointer games.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 12 +++++-------
>  1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> index 227734541316..7b67e8cecca2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> @@ -213,11 +213,9 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
>  		     unsigned int irq_type, unsigned int hw_prio,
>  		     atomic_t *sched_score)
>  {
> -	int r;
>  	int sched_hw_submission = amdgpu_sched_hw_submission;
> -	u32 *num_sched;
> -	u32 hw_ip;
>  	unsigned int max_ibs_dw;
> +	int r;
>  
>  	/* Set the hw submission limit higher for KIQ because
>  	 * it's used for a number of gfx/compute tasks by both
> @@ -359,10 +357,10 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
>  	ring->vmid_wait = dma_fence_get_stub();
>  
>  	if (!ring->no_scheduler && ring->funcs->type < AMDGPU_HW_IP_NUM) {
> -		hw_ip = ring->funcs->type;
> -		num_sched = &adev->gpu_sched[hw_ip][hw_prio].num_scheds;
> -		adev->gpu_sched[hw_ip][hw_prio].sched[(*num_sched)++] =
> -			&ring->sched;
> +		struct amdgpu_sched *gpu_sched =
> +			&adev->gpu_sched[ring->funcs->type][hw_prio];
> +
> +		gpu_sched->sched[gpu_sched->num_scheds++] = &ring->sched;
>  	}
>  
>  	return 0;


  reply	other threads:[~2026-10-20 13:55 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-20 13:27 [PATCH 0/3] Misc amdgpu cleanups Tvrtko Ursulin
2026-10-20 13:27 ` [PATCH 1/3] drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA instances Tvrtko Ursulin
2026-10-20 13:37   ` Christian König
2026-10-20 13:27 ` [PATCH 2/3] drm/amdgpu: Size the vm_pte_scheds " Tvrtko Ursulin
2026-10-20 13:47   ` Christian König
2026-10-20 13:27 ` [PATCH 3/3] drm/amdgpu: Simplify amdgpu_ring_init Tvrtko Ursulin
2026-10-20 13:55   ` Christian König [this message]
2026-10-21 13:38 ` [PATCH 0/3] Misc amdgpu cleanups Alex Deucher

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