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From: Ayan Kumar Halder <ayankuma@amd.com>
To: Hari Limaye <hari.limaye@arm.com>,
	Ayan Kumar Halder <ayan.kumar.halder@amd.com>
Cc: xen-devel@lists.xenproject.org,
	Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien@xen.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Michal Orzel <michal.orzel@amd.com>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	Luca Fancellu <luca.fancellu@arm.com>
Subject: Re: [PATCH v4 3/3] arm/mpu: Enable read/write to protection regions for arm32
Date: Tue, 17 Jun 2025 17:28:54 +0100	[thread overview]
Message-ID: <cf8ef00d-e0e3-4187-87ce-8de743de8d03@amd.com> (raw)
In-Reply-To: <ooreogquosdrshq6zw552mwqewoaxjhlwnaqqfx4aoips7cat4@qrhqnnknuejt>


On 17/06/2025 16:31, Hari Limaye wrote:
> Hi Ayan,
Hi Hari,
>
>> +/*
>> + * Armv8-R supports direct access and indirect access to the MPU regions through
>> + * registers:
>> + *  - indirect access involves changing the MPU region selector, issuing an isb
>> + *    barrier and accessing the selected region through specific registers
>> + *  - direct access involves accessing specific registers that point to
>> + *    specific MPU regions, without changing the selector, avoiding the use of
>> + *    a barrier.
>> + * For Arm32 the HPR{B,L}AR<n> (for n=0..31) are used for direct access to the
>> + * first 32 MPU regions.
>> + * For MPU region numbered 32..254, one need to set the region number in HPRSELR,
>> + * followed by configuring HPR{B,L}AR.
>> + */
>> +static void prepare_selector(uint8_t *sel)
> NIT: s/one need/one needs/
> NIT: s/MPU region numbered/MPU regions numbered/
Ack.
>
> Also - it's not clear to me what is meant by "followed by configuring HPR{B,L}AR";
> if I understand correctly, once we have set the region number in HPRSELR
> and issued an isb we can simply read/write HPR{B,L}AR as indicated in
> the bullet point above?
yes, this is correct.
>
>> On Tue, Jun 17, 2025 at 12:12:51PM +0000, Ayan Kumar Halder wrote:
>> Define prepare_selector(), read_protection_region() and
>> write_protection_region() for arm32. Also, define
>> GENERATE_{READ/WRITE}_PR_REG_OTHERS to access MPU regions from 32 to 254.
>>
>> Enable pr_{get/set}_{base/limit}(), region_is_valid() for arm32.
>> Enable pr_of_addr() for arm32.
>>
>> The maximum number of regions supported is 255 (which corresponds to the
>> maximum value in HMPUIR).
>>
>> Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com>
>> Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
>> ---
> Apart from the above, all LGTM! I've tested compilation for both 64-bit
> and 32-bit and all is building successfully.
>
> Reviewed-by: Hari Limaye <hari.limaye@arm.com>
> Tested-by: Hari Limaye <hari.limaye@arm.com>

- Ayan



  reply	other threads:[~2025-06-17 16:29 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-17 11:12 [PATCH v4 0/3] Enable R52 support for the first chunk of MPU support Ayan Kumar Halder
2025-06-17 11:12 ` [PATCH v4 1/3] arm/mpu: Move the functions to arm64 specific files Ayan Kumar Halder
2025-06-17 11:27   ` Orzel, Michal
2025-06-17 11:12 ` [PATCH v4 2/3] arm/mpu: Define arm32 system registers Ayan Kumar Halder
2025-06-17 11:27   ` Orzel, Michal
2025-06-17 11:12 ` [PATCH v4 3/3] arm/mpu: Enable read/write to protection regions for arm32 Ayan Kumar Halder
2025-06-17 12:10   ` Luca Fancellu
2025-06-17 15:31   ` Hari Limaye
2025-06-17 16:28     ` Ayan Kumar Halder [this message]
2025-06-19 10:53   ` Julien Grall

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