diff for duplicates of <cfb8b2bc8249dea9676dc6493baf2cdbeb38f943.camel@mediatek.com> diff --git a/N1/2.bin b/N1/2.bin new file mode 100644 index 0000000..b5c6219 --- /dev/null +++ b/N1/2.bin @@ -0,0 +1,105 @@ +<html><body><p> +<pre> +On Mon, 2025-02-17 at 15:25 +0100, AngeloGioacchino Del Regno wrote: +>  +> External email : Please do not click links or open attachments until +> you have verified the sender or the content. +>  +>  +> Il 17/02/25 07:06, CK Hu (胡俊光) ha scritto: +> > On Tue, 2025-02-11 at 10:52 +0800, Sunny Shen wrote: +> > > Due to the path mux design of the MT8196, the following +> > > components +> > > need to be added to support Picture Quality (PQ) in the main +> > > display +> > > path: CCORR0, CCORR1, DITHER0, GAMMA0, MDP_RSZ0, POSTMASK0, +> > > TDSHP0. +> >  +> > Reviewed-by: CK Hu <ck.hu@mediatek.com> +> >  +> > >  +> > > Signed-off-by: Sunny Shen <sunny.shen@mediatek.com> +> > > --- +> > >   drivers/gpu/drm/mediatek/mtk_drm_drv.c | 7 +++++++ +> > >   1 file changed, 7 insertions(+) +> > >  +> > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +> > > b/drivers/gpu/drm/mediatek/mtk_drm_drv.c +> > > index b810a197f58b..1c97dc46ae70 100644 +> > > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +> > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c +> > > @@ -242,6 +242,13 @@ static const unsigned int +> > > mt8196_mtk_ddp_ovl0_main[] = { +> > >  +> > >   static const unsigned int mt8196_mtk_ddp_disp0_main[] = { +>  +> If you build the display controller path with an OF graph, you don't +> need to +> introduce any mt8196_mtk_ddp_disp0_main, at all. +>  +> Since all this work was done and upstreamed, and was done because +> hardcoding +> the display pipeline for each board is only bloating the driver (and +> wrong), +> just express the pipeline with a graph in the devicetree. +>  +> The driver doesn't need that array, not anymore. +>  +> Regards, +> Angelo + +Hi Angelo, + +Thank you for the review +  +We are still investigating the method of using OF graph. +I can find a patch of add controllor graph here +(https://patchwork.kernel.org/project/linux-mediatek/patch/20250220110948.45596-2-angelogioacchino.delregno@collabora.com/ +) +May I ask that is there any example of driver config display path by OF +graph? +  +And since the path control is not the main topic of PQ support. +Should we discard the change of this file +and modify the patch added path of mt8196? +(https://patchwork.kernel.org/project/linux-mediatek/patch/20250321093435.94835-16-paul-pl.chen@mediatek.com/ +) +Or add a new patch series? + +Regards, +Sunny + +>  +> > >      DDP_COMPONENT_DLI_ASYNC0, +> > > +    DDP_COMPONENT_MDP_RSZ0, +> > > +    DDP_COMPONENT_TDSHP0, +> > > +    DDP_COMPONENT_CCORR0, +> > > +    DDP_COMPONENT_CCORR1, +> > > +    DDP_COMPONENT_GAMMA0, +> > > +    DDP_COMPONENT_POSTMASK0, +> > > +    DDP_COMPONENT_DITHER0, +> > >      DDP_COMPONENT_DLO_ASYNC1, +> > >   }; +> > >  +> >  +>  +>  +>  + + +</pre> +</p></body></html><!--type:text--><!--{--><pre>************* MEDIATEK Confidentiality Notice + ******************** +The information contained in this e-mail message (including any +attachments) may be confidential, proprietary, privileged, or otherwise +exempt from disclosure under applicable laws. It is intended to be +conveyed only to the designated recipient(s). Any use, dissemination, +distribution, printing, retaining or copying of this e-mail (including its +attachments) by unintended recipient(s) is strictly prohibited and may +be unlawful. If you are not an intended recipient of this e-mail, or believe + +that you have received this e-mail in error, please notify the sender +immediately (by replying to this e-mail), delete any and all copies of +this e-mail (including any attachments) from your system, and do not +disclose the content of this e-mail to any other person. Thank you! +</pre><!--}--> diff --git a/N1/2.hdr b/N1/2.hdr new file mode 100644 index 0000000..da1f671 --- /dev/null +++ b/N1/2.hdr @@ -0,0 +1,3 @@ +Content-Type: text/html; + charset="utf-8" +Content-Transfer-Encoding: base64 diff --git a/a/content_digest b/N1/content_digest index f21a484..3cd8419 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -23,7 +23,7 @@ linux-mediatek@lists.infradead.org <linux-mediatek@lists.infradead.org> matthias.bgg@gmail.com <matthias.bgg@gmail.com> " p.zabel@pengutronix.de <p.zabel@pengutronix.de>\0" - "\00:1\0" + "\01:1\0" "b\0" "On Mon, 2025-02-17 at 15:25 +0100, AngeloGioacchino Del Regno wrote:\n" "> \n" @@ -110,5 +110,112 @@ "> \n" "> \n" > + "\01:2\0" + "b\0" + "<html><body><p>\r\n" + "<pre>\r\n" + "On Mon, 2025-02-17 at 15:25 +0100, AngeloGioacchino Del Regno wrote:\r\n" + "> \r\n" + "> External email : Please do not click links or open attachments until\r\n" + "> you have verified the sender or the content.\r\n" + "> \r\n" + "> \r\n" + "> Il 17/02/25 07:06, CK Hu (胡俊光) ha scritto:\r\n" + "> > On Tue, 2025-02-11 at 10:52 +0800, Sunny Shen wrote:\r\n" + "> > > Due to the path mux design of the MT8196, the following\r\n" + "> > > components\r\n" + "> > > need to be added to support Picture Quality (PQ) in the main\r\n" + "> > > display\r\n" + "> > > path: CCORR0, CCORR1, DITHER0, GAMMA0, MDP_RSZ0, POSTMASK0,\r\n" + "> > > TDSHP0.\r\n" + "> > \r\n" + "> > Reviewed-by: CK Hu <ck.hu@mediatek.com>\r\n" + "> > \r\n" + "> > > \r\n" + "> > > Signed-off-by: Sunny Shen <sunny.shen@mediatek.com>\r\n" + "> > > ---\r\n" + "> > >   drivers/gpu/drm/mediatek/mtk_drm_drv.c | 7 +++++++\r\n" + "> > >   1 file changed, 7 insertions(+)\r\n" + "> > > \r\n" + "> > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c\r\n" + "> > > b/drivers/gpu/drm/mediatek/mtk_drm_drv.c\r\n" + "> > > index b810a197f58b..1c97dc46ae70 100644\r\n" + "> > > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c\r\n" + "> > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c\r\n" + "> > > @@ -242,6 +242,13 @@ static const unsigned int\r\n" + "> > > mt8196_mtk_ddp_ovl0_main[] = {\r\n" + "> > > \r\n" + "> > >   static const unsigned int mt8196_mtk_ddp_disp0_main[] = {\r\n" + "> \r\n" + "> If you build the display controller path with an OF graph, you don't\r\n" + "> need to\r\n" + "> introduce any mt8196_mtk_ddp_disp0_main, at all.\r\n" + "> \r\n" + "> Since all this work was done and upstreamed, and was done because\r\n" + "> hardcoding\r\n" + "> the display pipeline for each board is only bloating the driver (and\r\n" + "> wrong),\r\n" + "> just express the pipeline with a graph in the devicetree.\r\n" + "> \r\n" + "> The driver doesn't need that array, not anymore.\r\n" + "> \r\n" + "> Regards,\r\n" + "> Angelo\r\n" + "\r\n" + "Hi Angelo,\r\n" + "\r\n" + "Thank you for the review\r\n" + " \r\n" + "We are still investigating the method of using OF graph.\r\n" + "I can find a patch of add controllor graph here\r\n" + "(https://patchwork.kernel.org/project/linux-mediatek/patch/20250220110948.45596-2-angelogioacchino.delregno@collabora.com/\r\n" + ")\r\n" + "May I ask that is there any example of driver config display path by OF\r\n" + "graph?\r\n" + " \r\n" + "And since the path control is not the main topic of PQ support.\r\n" + "Should we discard the change of this file\r\n" + "and modify the patch added path of mt8196?\r\n" + "(https://patchwork.kernel.org/project/linux-mediatek/patch/20250321093435.94835-16-paul-pl.chen@mediatek.com/\r\n" + ")\r\n" + "Or add a new patch series?\r\n" + "\r\n" + "Regards,\r\n" + "Sunny\r\n" + "\r\n" + "> \r\n" + "> > >      DDP_COMPONENT_DLI_ASYNC0,\r\n" + "> > > +    DDP_COMPONENT_MDP_RSZ0,\r\n" + "> > > +    DDP_COMPONENT_TDSHP0,\r\n" + "> > > +    DDP_COMPONENT_CCORR0,\r\n" + "> > > +    DDP_COMPONENT_CCORR1,\r\n" + "> > > +    DDP_COMPONENT_GAMMA0,\r\n" + "> > > +    DDP_COMPONENT_POSTMASK0,\r\n" + "> > > +    DDP_COMPONENT_DITHER0,\r\n" + "> > >      DDP_COMPONENT_DLO_ASYNC1,\r\n" + "> > >   };\r\n" + "> > > \r\n" + "> > \r\n" + "> \r\n" + "> \r\n" + "> \r\n" + "\r\n" + "\r\n" + "</pre>\r\n" + "</p></body></html><!--type:text--><!--{--><pre>************* MEDIATEK Confidentiality Notice\r\n" + " ********************\r\n" + "The information contained in this e-mail message (including any \r\n" + "attachments) may be confidential, proprietary, privileged, or otherwise\r\n" + "exempt from disclosure under applicable laws. It is intended to be \r\n" + "conveyed only to the designated recipient(s). Any use, dissemination, \r\n" + "distribution, printing, retaining or copying of this e-mail (including its \r\n" + "attachments) by unintended recipient(s) is strictly prohibited and may \r\n" + "be unlawful. If you are not an intended recipient of this e-mail, or believe\r\n" + " \r\n" + "that you have received this e-mail in error, please notify the sender \r\n" + "immediately (by replying to this e-mail), delete any and all copies of \r\n" + "this e-mail (including any attachments) from your system, and do not\r\n" + "disclose the content of this e-mail to any other person. Thank you!\r\n" + </pre><!--}--> -8682aee021f8de9962ef90b28f2a322856beb3bb83db1deee9778d24c2e3ce2a +1f6b82462958838db2e139569fdc80817492b8b24ec25d5228f4fea1406ce2cd
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