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From: Hongxu Jia <hongxu.jia@windriver.com>
To: <openembedded-core@lists.openembedded.org>
Date: Mon, 23 Sep 2013 16:55:06 +0800
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Subject: [RFC YOCTO #5248] core-image-lsb: Why FPU doesn't work correctly on qemux86-64
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*Preparation
1, vim local.conf
...
DISTRO ?= "poky-lsb"
MACHINE ?= "qemux86-64"
...

*Problem
1, Build core-image-lsb
..
bitbake core-image-lsb
..

2, Start qemux86-64, there are 21 LSB tcl test failures on
qemux86-64, you could reproduce it by tcl interpreter:
  1, On qemux86-64's terminal, start tcl interpreter
  root@qemux86-64:~# $ tclsh
  %

  2, Run 'binary scan' to assign ieeeValues(-Subnormal)
  % binary scan \x00\x00\x00\x00\x00\x00\x08\x80 d ieeeValues(-Subnormal) 
  1

  3, Run 'puts' to output ieeeValues(-Subnormal), the result is '0.0'
  % puts $ieeeValues(-Subnormal)
  -0.0

  Expected:
  -1.1125369292536007e-308

*Analysis
1, On the previous environment, add IMAGE_INSTALL_append = " tcl" to
local.conf and build core-image-sato, the result is expected.

2, Trace tcl's source code, you could also reproduce the issue by
compiling and executing the following C codes on core-image-lsb-sdk.

  1) Build core-image-lsb-sdk, and Run qemux86-64.
  2) On target's terminal, create a C source file:
     root@qemux86-64:~# cat >> test.c << EOF
#include <stdio.h>

int main(int argc, char *argv[])
{
  double dd = 0;
  char *p = (char*)&dd;
  p[0] = 0x00;
  p[1] = 0x00;
  p[2] = 0x00;
  p[3] = 0x00;
  p[4] = 0x00;
  p[5] = 0x00;
  p[6] = 0x08;
  p[7] = 0x00;

  if (dd == 0.0)
    printf("Incorrect equal 0.0\n");
  else
    printf("Expected not equal 0.0\n");

  return 0;
}
EOF

  2) Compile test.c
    root@qemux86-64:~# gcc test.c -o test

  3, Execute test
  $ root@qemux86-64:~# ./test
    Incorrect equal 0.0

  Expected:
    Expected not equal 0.0

3, It's about x86-64's FPU: the SSE MXCSR register.
  If you invoke 'feenableexcept(FE_INEXACT);' or
  'feclearexcept(FE_INEXACT);' in the above C test,
  the issue will be fixed. In these two functions,
  the SSE MXCSR register has been handled.

*Solution
Is it necessary to invoke 'feenableexcept(FE_INEXACT);' or
'feclearexcept(FE_INEXACT);' to handle SSE MXCSR register?

Or any good idea about this issue.

Thanks,
Hongxu




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