From: Joao Pinto <Joao.Pinto@synopsys.com>
To: bhelgaas@google.com, marc.zyngier@arm.com
Cc: jingoohan1@gmail.com, m-karicheri2@ti.com,
thomas.petazzoni@free-electrons.com, minghuan.Lian@freescale.com,
mingkai.hu@freescale.com, tie-fei.zang@freescale.com,
hongxing.zhu@nxp.com, l.stach@pengutronix.de,
niklas.cassel@axis.com, jesper.nilsson@axis.com,
wangzhou1@hisilicon.com, gabriele.paoloni@huawei.com,
svarbanov@mm-sol.com, linux-pci@vger.kernel.org,
Joao Pinto <Joao.Pinto@synopsys.com>
Subject: [RFC v2 0/8] add new irq api to pcie-designware
Date: Mon, 15 May 2017 18:03:40 +0100 [thread overview]
Message-ID: <cover.1494867112.git.jpinto@synopsys.com> (raw)
This patch series adds the new interrupt api to pcie-designware
make it possible to use features like MSIX.
The work consisted of adapting the pcie-designware-host and each SoC
specific driver.
Joao Pinto (8):
pci: adding new irq api to pci-designware
pci: exynos SoC driver adapted to new irq API
pci: imx6 SoC driver adapted to new irq API
pci: artpec6 SoC driver adapted to new irq API
pci: generic PCIe DW driver adapted to new irq API
pci: qcom SoC driver adapted to new irq API
pci: keystone SoC driver adapted to new irq API
pci: removing old irq api from pcie-designware
drivers/pci/dwc/pci-exynos.c | 18 --
drivers/pci/dwc/pci-imx6.c | 18 --
drivers/pci/dwc/pci-keystone-dw.c | 97 +--------
drivers/pci/dwc/pci-keystone.c | 1 +
drivers/pci/dwc/pci-keystone.h | 4 +-
drivers/pci/dwc/pci-layerscape.c | 4 +-
drivers/pci/dwc/pcie-artpec6.c | 18 --
drivers/pci/dwc/pcie-designware-host.c | 372 ++++++++++++++++++---------------
drivers/pci/dwc/pcie-designware-plat.c | 15 --
drivers/pci/dwc/pcie-designware.h | 18 +-
drivers/pci/dwc/pcie-qcom.c | 15 --
11 files changed, 231 insertions(+), 349 deletions(-)
--
2.9.3
next reply other threads:[~2017-05-15 17:03 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-15 17:03 Joao Pinto [this message]
2017-05-15 17:03 ` [RFC v2 1/8] pci: adding new irq api to pci-designware Joao Pinto
2017-05-21 8:44 ` Marc Zyngier
2017-05-22 9:24 ` Joao Pinto
2017-05-15 17:03 ` [RFC v2 2/8] pci: exynos SoC driver adapted to new irq API Joao Pinto
2017-05-18 18:50 ` Jingoo Han
2017-05-15 17:03 ` [RFC v2 3/8] pci: imx6 " Joao Pinto
2017-05-15 17:03 ` [RFC v2 4/8] pci: artpec6 " Joao Pinto
2017-05-15 17:03 ` [RFC v2 5/8] pci: generic PCIe DW " Joao Pinto
2017-05-15 17:03 ` [RFC v2 6/8] pci: qcom SoC " Joao Pinto
2017-05-15 17:03 ` [RFC v2 7/8] pci: keystone " Joao Pinto
2017-05-15 17:03 ` [RFC v2 8/8] pci: removing old irq api from pcie-designware Joao Pinto
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1494867112.git.jpinto@synopsys.com \
--to=joao.pinto@synopsys.com \
--cc=bhelgaas@google.com \
--cc=gabriele.paoloni@huawei.com \
--cc=hongxing.zhu@nxp.com \
--cc=jesper.nilsson@axis.com \
--cc=jingoohan1@gmail.com \
--cc=l.stach@pengutronix.de \
--cc=linux-pci@vger.kernel.org \
--cc=m-karicheri2@ti.com \
--cc=marc.zyngier@arm.com \
--cc=minghuan.Lian@freescale.com \
--cc=mingkai.hu@freescale.com \
--cc=niklas.cassel@axis.com \
--cc=svarbanov@mm-sol.com \
--cc=thomas.petazzoni@free-electrons.com \
--cc=tie-fei.zang@freescale.com \
--cc=wangzhou1@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.