From: Dilip Kota <eswara.kota@linux.intel.com>
To: lorenzo.pieralisi@arm.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, andriy.shevchenko@intel.com
Cc: gustavo.pimentel@synopsys.com, andrew.murray@arm.com,
robh@kernel.org, linux-kernel@vger.kernel.org,
cheol.yong.kim@intel.com, chuanhua.lei@linux.intel.com,
qi-ming.wu@intel.com, Dilip Kota <eswara.kota@linux.intel.com>
Subject: [PATCH v10 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file
Date: Fri, 6 Dec 2019 15:27:47 +0800 [thread overview]
Message-ID: <cover.1575612493.git.eswara.kota@linux.intel.com> (raw)
Intel PCIe is Synopsys based controller. Intel PCIe driver uses
DesignWare PCIe framework for host initialization and register
configurations.
Changes on v10:
Rebase the patches on mainline v5.4
Squashed the patch that fixes the below issue to this patch series.
WARNING: unmet direct dependencies detected for PCIE_DW_HOST
Depends on [n]: PCI [=y] && PCI_MSI_IRQ_DOMAIN [=n]
Selected by [y]:
- PCIE_INTEL_GW [=y] && PCI [=y] && OF [=y] && (X86 [=y] || COMPILE_TEST [=n])
"reportedby Randy Dunlap <rdunlap@infradead.org>"
Dilip Kota (3):
dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
PCI: dwc: intel: PCIe RC controller driver
PCI: artpec6: Configure FTS with dwc helper function
.../devicetree/bindings/pci/intel-gw-pcie.yaml | 138 ++++++
drivers/pci/controller/dwc/Kconfig | 11 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-artpec6.c | 8 +-
drivers/pci/controller/dwc/pcie-designware.c | 57 +++
drivers/pci/controller/dwc/pcie-designware.h | 12 +
drivers/pci/controller/dwc/pcie-intel-gw.c | 545 +++++++++++++++++++++
include/uapi/linux/pci_regs.h | 1 +
8 files changed, 766 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c
--
2.11.0
next reply other threads:[~2019-12-06 7:28 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-06 7:27 Dilip Kota [this message]
2019-12-06 7:27 ` [PATCH v10 1/3] dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller Dilip Kota
2019-12-06 7:27 ` [PATCH v10 2/3] PCI: dwc: intel: PCIe RC controller driver Dilip Kota
2019-12-10 23:49 ` Bjorn Helgaas
2019-12-11 9:59 ` Dilip Kota
2019-12-11 14:20 ` Bjorn Helgaas
2019-12-11 23:46 ` Andrew Murray
2019-12-06 7:27 ` [PATCH v10 3/3] PCI: artpec6: Configure FTS with dwc helper function Dilip Kota
2019-12-06 10:51 ` [PATCH v10 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1575612493.git.eswara.kota@linux.intel.com \
--to=eswara.kota@linux.intel.com \
--cc=andrew.murray@arm.com \
--cc=andriy.shevchenko@intel.com \
--cc=cheol.yong.kim@intel.com \
--cc=chuanhua.lei@linux.intel.com \
--cc=devicetree@vger.kernel.org \
--cc=gustavo.pimentel@synopsys.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=qi-ming.wu@intel.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.