From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
linux-riscv@lists.infradead.org
Cc: Atish Patra <atishp@atishpatra.org>
Subject: [PATCH 0/2] RISC-V: some improvements for Atish's framework (for v5)
Date: Wed, 16 Feb 2022 14:04:25 +0900 [thread overview]
Message-ID: <cover.1644987761.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <20220216002911.1219593-1-atishp@rivosinc.com>
This is patches for Atish's ISA framework patchset v4 (intended to be
squashed into patch 3 and 6 of it).
Changes:
1. It now skips 'S' and 'U' single-letter "extensions" on QEMU
(with M/S/U modes) without handling as real extensions.
2. Split base ISA using minimal parser (not by just splitting with '_',
find and stop before the first multi-letter extensions, stripping
version numbers)
Tsukasa OI (2):
RISC-V: Better 'S' workaround
RISC-V: Extract base ISA from device tree
arch/riscv/kernel/cpu.c | 83 ++++++++++++++++++++++++++++++----
arch/riscv/kernel/cpufeature.c | 10 ++--
2 files changed, 81 insertions(+), 12 deletions(-)
base-commit: e9e240c9a854dceb434ceb53bdbe82a657bee5f2
--
2.32.0
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next prev parent reply other threads:[~2022-02-16 5:04 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-16 0:29 [PATCH v4 0/6] Provide a fraemework for RISC-V ISA extensions Atish Patra
2022-02-16 0:29 ` Atish Patra
2022-02-16 0:29 ` [PATCH v4 1/6] RISC-V: Correctly print supported extensions Atish Patra
2022-02-16 0:29 ` Atish Patra
2022-02-16 0:29 ` [PATCH v4 2/6] RISC-V: Minimal parser for "riscv, isa" strings Atish Patra
2022-02-16 0:29 ` Atish Patra
2022-02-16 0:29 ` [PATCH v4 3/6] RISC-V: Extract multi-letter extension names from "riscv, isa" Atish Patra
2022-02-16 0:29 ` Atish Patra
2022-02-16 0:29 ` [PATCH v4 4/6] RISC-V: Implement multi-letter ISA extension probing framework Atish Patra
2022-02-16 0:29 ` Atish Patra
2022-02-16 11:43 ` Heiko Stübner
2022-02-16 11:43 ` Heiko Stübner
2022-02-16 0:29 ` [PATCH v4 5/6] RISC-V: Do no continue isa string parsing without correct XLEN Atish Patra
2022-02-16 0:29 ` Atish Patra
2022-02-16 11:46 ` Heiko Stübner
2022-02-16 11:46 ` Heiko Stübner
2022-02-16 0:29 ` [PATCH v4 6/6] RISC-V: Improve /proc/cpuinfo output for ISA extensions Atish Patra
2022-02-16 0:29 ` Atish Patra
2022-02-16 11:46 ` Heiko Stübner
2022-02-16 11:46 ` Heiko Stübner
2022-02-16 5:04 ` Tsukasa OI [this message]
2022-02-16 5:04 ` [PATCH 1/2] RISC-V: Better 'S' workaround Tsukasa OI
2022-02-16 5:04 ` [PATCH 2/2] RISC-V: Extract base ISA from device tree Tsukasa OI
2022-02-16 6:01 ` Atish Patra
2022-02-16 6:58 ` Tsukasa OI
2022-02-16 7:43 ` Atish Patra
2022-02-21 13:42 ` Tsukasa OI
2022-02-22 18:10 ` Atish Patra
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