From: Sandipan Das <sandipan.das@amd.com>
To: <linux-perf-users@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <x86@kernel.org>, <peterz@infradead.org>, <mingo@redhat.com>,
<acme@kernel.org>, <mark.rutland@arm.com>,
<alexander.shishkin@linux.intel.com>, <jolsa@kernel.org>,
<namhyung@kernel.org>, <adrian.hunter@intel.com>,
<tglx@linutronix.de>, <bp@alien8.de>, <eranian@google.com>,
<irogers@google.com>, <mario.limonciello@amd.com>,
<ravi.bangoria@amd.com>, <ananth.narayan@amd.com>,
<sandipan.das@amd.com>
Subject: [PATCH v2 0/3] perf/x86/amd: Miscellaneous fixes
Date: Tue, 2 Jan 2024 11:31:27 +0530 [thread overview]
Message-ID: <cover.1704103399.git.sandipan.das@amd.com> (raw)
Contains fixes w.r.t usage of LBR Freeze, Erratum 1452 and a bug in the
CPU offline path where PMU-related registers are reset.
Previous versions can be found at:
v1: https://lore.kernel.org/all/cover.1702833179.git.sandipan.das@amd.com/
Changes in v2:
- Make the LBR and PMC Freeze feature bit visible in /proc/cpuinfo. As
suggested by Stephane, this will be useful to determine if it is
feasible to perform kernel FDO on a system.
Sandipan Das (3):
perf/x86/amd/lbr: Use freeze based on availability
perf/x86/amd/lbr: Discard erroneous branch entries
perf/x86/amd/core: Avoid register reset when CPU is dead
arch/x86/events/amd/core.c | 5 ++---
arch/x86/events/amd/lbr.c | 22 ++++++++++++++--------
arch/x86/include/asm/cpufeatures.h | 2 +-
arch/x86/kernel/cpu/scattered.c | 1 +
4 files changed, 18 insertions(+), 12 deletions(-)
--
2.34.1
next reply other threads:[~2024-01-02 6:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-02 6:01 Sandipan Das [this message]
2024-01-02 6:01 ` [PATCH v2 1/3] perf/x86/amd/lbr: Use freeze based on availability Sandipan Das
2024-01-02 10:34 ` Borislav Petkov
2024-01-02 6:01 ` [PATCH v2 2/3] perf/x86/amd/lbr: Discard erroneous branch entries Sandipan Das
2024-01-02 6:01 ` [PATCH v2 3/3] perf/x86/amd/core: Avoid register reset when CPU is dead Sandipan Das
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