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From: Lukas Wunner <lukas@wunner.de>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org, Niklas Schnelle <niks@kernel.org>,
	Ilpo Jarvinen <ilpo.jarvinen@linux.intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	"Maciej W. Rozycki" <macro@orcam.me.uk>,
	Mario Limonciello <mario.limonciello@amd.com>
Subject: [PATCH for-linus v2 0/3] Fix bwctrl boot hang
Date: Sun, 15 Dec 2024 11:20:50 +0100	[thread overview]
Message-ID: <cover.1734257330.git.lukas@wunner.de> (raw)

Here's my renewed proposal to fix the boot hang reported by Niklas
when enabling the bandwidth controller on Intel JHL7540 "Titan Ridge 2018"
Thunderbolt controllers.

@Niklas, could you re-test this?

I believe I've addressed all the feedback on v1, please let me know
if I've missed anything.


Changes v1 -> v2:

* [PATCH 2/3] PCI: Honor Max Link Speed when determining supported speeds
  * Use PCI_EXP_LNKCAP2_SLS_2_5GB as lowest bit in GENMASK() macro
    (Ilpo, Niklas).
  * Mention user-visible issues addressed by the patch in commit message
    (Bjorn).

* [PATCH 1/3] PCI: Assume 2.5 GT/s if Max Link Speed is undefined
  * New patch to prevent invocation of malformed GENMASK(0, lowest) macro.

* [PATCH 3/3] PCI/bwctrl: Enable only if more than one speed is supported
  * New patch to prevent the boot hang.  This is a future-proof alternative
    to Niklas' patch.


Link to v1, prior discussion and Niklas' patch:

https://lore.kernel.org/r/e3386d62a766be6d0ef7138a001dabfe563cdff8.1733991971.git.lukas@wunner.de/
https://lore.kernel.org/r/db8e457fcd155436449b035e8791a8241b0df400.camel@kernel.org/
https://lore.kernel.org/r/20241207-fix_bwctrl_thunderbolt-v1-1-b711f572a705@kernel.org/
https://lore.kernel.org/r/20241213-fix_bwctrl_thunderbolt-v2-1-b52fef641dfc@kernel.org/


Lukas Wunner (3):
  PCI: Assume 2.5 GT/s if Max Link Speed is undefined
  PCI: Honor Max Link Speed when determining supported speeds
  PCI/bwctrl: Enable only if more than one speed is supported

 drivers/pci/pci.c          | 13 +++++++++++--
 drivers/pci/pcie/portdrv.c |  4 +++-
 2 files changed, 14 insertions(+), 3 deletions(-)

-- 
2.43.0


             reply	other threads:[~2024-12-15 10:22 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-15 10:20 Lukas Wunner [this message]
2024-12-15 10:20 ` [PATCH for-linus v2 1/3] PCI: Assume 2.5 GT/s if Max Link Speed is undefined Lukas Wunner
2024-12-15 21:17   ` Niklas Schnelle
2024-12-16  6:45     ` Lukas Wunner
2024-12-16 10:51   ` Jonathan Cameron
2024-12-16 14:09   ` Ilpo Järvinen
2024-12-16 14:17   ` Mario Limonciello
2024-12-15 10:20 ` [PATCH for-linus v2 2/3] PCI: Honor Max Link Speed when determining supported speeds Lukas Wunner
2024-12-15 20:56   ` Niklas Schnelle
2024-12-16 10:53   ` Jonathan Cameron
2024-12-16 14:12   ` Ilpo Järvinen
2024-12-15 10:20 ` [PATCH for-linus v2 3/3] PCI/bwctrl: Enable only if more than one speed is supported Lukas Wunner
2024-12-15 21:03   ` Niklas Schnelle
2024-12-16 11:32   ` Jonathan Cameron
2024-12-16 14:20     ` Mario Limonciello

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