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Dear Julien and Volodymyr, Thank you for your review and suggestions in V2. Following our discussion about memory overhead when eSPI support is enabled by default, I have changed the default value to 'n' in Kconfig. Since implementing dynamic allocation for the IRQ descriptors array may require more time, I decided to go with this solution for now and plan to prepare the next patch series with dynamic allocation later. Additionally, I have added stubs for non-eSPI builds where possible and reorganized some code to reduce the number of #ifdefs. Dear Oleksandr, First of all, thank you for your review and for verifying the build on the dom0less setup. I rechecked the dom0less code and added the necessary changes to support eSPI in these setups as well. I also want to mention that I verified the build with Dom0 and DomUs and checked eSPI functionality on real hardware (e.g., passthrough devices, changing IRQ affinity in DomU, etc.). Everything works as expected for devices with eSPIs and regular SPIs. Unfortunately, I don't have setup with Dom0less + eSPI to check it quickly, but Oleksandr has confirmed that at least regular SPIs work fine with and without eSPI enabled on a non-eSPI Dom0less setup (with V2): > I have lightly re-checked the simple Arm64 Xen environment (dom0less=20 > DomU under QEMU) with your series applied. To be clear, I did not really= =20 > test the eSPI support (the underlying GICv3 HW does support it); I just=20 > wanted to ensure that your series would not break anything. So, in both=20 > cases (CONFIG_GICV3_ESPI=3Dy and CONFIG_GICV3_ESPI=3Dn), I did not notice= =20 > any issues (at least obvious) related to GICv3 emulation and SPI=20 > injection for the passed-through device. Summarized description: This patch series adds support for the extended shared peripheral interrupt (eSPI) range (INTIDs 4096-5119 [2](ranges of INTIDs)) for Xen and guest domains. The implementation uses a generic approach to handle eSPIs, similar to regular SPIs, while maintaining compatibility with the existing SPI range. Functionality remains unchanged for setups that do not require eSPIs. The series includes: 1) General refactoring of common IRQ operations with GIC registers to improve code readability, simplify further maintenance and prepare the key functions for eSPI implementation. 2) Introducing a new Kconfig option (default n) to enable or disable eSPI support. Disabling this option prevents unnecessary resource allocation for setups that do not require eSPIs. 3) Adding additional resources to store required information and operate with up to 1024 interrupts from eSPI range. 4) Adjusting assertions and checks to pass verification for INTIDs in the eSPI range. 5) Configuration of eSPI-specific registers during GIC initialization for systems with GICv3.1+ hardware. 6) Enables eSPI MMIO emulation for vGIC, allowing guest domains to access and operate within the eSPI's INTIDs. Changes in V2: - added 2 more patches to implement helper functions for gic/vgic: xen/arm: gic: implement helper functions for INTID checks xen/arm: vgic: implement helper functions for virq checks - removed 2 patches: xen/arm/irq: allow assignment/releasing of eSPI interrupts xen/arm: gic/irq: permit routing of eSPI interrupts to Xen and domains since their functionality can be moved to appropriate patches after introducing patches with helper functions - individual changes in patches Link on V1: - https://lists.xenproject.org/archives/html/xen-devel/2025-07/msg01809.htm= l Changes in V3: - added a patch to update CHANGELOG.md - individual changes in patches Link on V2: - https://lists.xenproject.org/archives/html/xen-devel/2025-08/msg00372.htm= l Leonid Komarianskyi (11): xen/arm: gicv3: refactor obtaining GIC addresses for common operations xen/arm: gic: implement helper functions for INTID checks xen/arm: vgic: implement helper functions for virq checks xen/arm/irq: add handling for IRQs in the eSPI range xen/arm: gicv3: implement handling of GICv3.1 eSPI xen/arm/irq: allow eSPI processing in the do_IRQ function xen/arm: gicv3: modify ICH_LR_PHYSICAL_MASK to allow eSPI processing xen/arm: vgic: add resource management for extended SPIs xen/arm: domain_build/dom0less-build: adjust domains config to support eSPIs xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers CHANGELOG.md: add mention of GICv3.1 eSPI support CHANGELOG.md | 1 + xen/arch/arm/Kconfig | 9 + xen/arch/arm/dom0less-build.c | 12 ++ xen/arch/arm/domain_build.c | 11 + xen/arch/arm/gic-v3.c | 192 ++++++++++++++--- xen/arch/arm/gic.c | 7 +- xen/arch/arm/include/asm/gic.h | 30 +++ xen/arch/arm/include/asm/gic_v3_defs.h | 36 +++- xen/arch/arm/include/asm/irq.h | 27 +++ xen/arch/arm/include/asm/vgic.h | 39 ++++ xen/arch/arm/irq.c | 58 +++++- xen/arch/arm/vgic-v3.c | 275 ++++++++++++++++++++++++- xen/arch/arm/vgic.c | 222 +++++++++++++++++++- xen/arch/arm/vgic/vgic.c | 5 + 14 files changed, 868 insertions(+), 56 deletions(-) --=20 2.34.1