From: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
To: Dinh Nguyen <dinguyen@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
Vinod Koul <vkoul@kernel.org>,
dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Subject: [PATCH v4 0/3] Add Agilex5 AXI DMA support
Date: Wed, 17 Dec 2025 07:26:15 +0800 [thread overview]
Message-ID: <cover.1765845252.git.khairul.anuar.romli@altera.com> (raw)
This series introduces support for Agilex5 SoC in the Synopsys DesignWare
AXI DMA binding and updates the device tree to use the platform-specific
compatible string.
The Agilex5 only has 40-bit DMA addressable bit instead of 64-bit. Hence,
this specific addition will enable driver to handle this limitation.
---
Notes:
This patch series is applied on socfpga maintainer's tree
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.20
Changes in v4:
- Use common code to get dma ranges.
- Simplify the code to only in hw_init that will set the bit mask.
Changes in v3:
- simplify dma-ranges addition without description as per input
from Rob.
- Add simple-bus to with address-cells, size-cells, dma-ranges
added under this bus-node.
- Move dma controller device node under simple-bus node.
- Rename "arm64: dts: intel: agilex5: Add dma-ranges, address and size
cells to dma node" to #2
- Drop "dt-bindings: dma: snps,dw-axi-dmac: Add #address-cells and
#size-cells"
- Refactor "dma: dw-axi-dmac: Add support for Agilex5 and dynamic bus
width" to align with dma controller node now under simple-bus node.
Changes in v2:
- Add dma-ranges property.
- Add address-cells and size-cells due to warning when dma-ranges
is define without address-cells and size-cells present. Also
prevent kernel panic if address-cells and size-cells are not
defined.
- Add driver support to handle defined properties and set the DMA
BIT MASK according to value from DT.
- Rename "arm64: dts: agilex5: Use platform-specific compatible for
AXI DMA" to "arm64: dts: intel: agilex5: Add dma-ranges and
address cells to dma node"
This changes is validated on:
- intel/socfpga_agilex5_socdk.dtb
- snps,dw-axi-dmac.yaml
- snps,dw-axi-dmac.yaml intel/socfpga_agilex5_socdk.dtb
- Agilex5 devkit
---
Khairul Anuar Romli (3):
dt-bindings: dma: snps,dw-axi-dmac: Add compatible string for Agilex5
arm64: dts: intel: agilex5: Add simple-bus node on top of dma
controller node
dma: dw-axi-dmac: Add support for Agilex5 and dynamic bus width
.../bindings/dma/snps,dw-axi-dmac.yaml | 14 ++--
.../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 78 ++++++++++---------
.../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 16 +++-
drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 1 +
4 files changed, 68 insertions(+), 41 deletions(-)
--
2.43.7
next reply other threads:[~2025-12-16 23:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-16 23:26 Khairul Anuar Romli [this message]
2025-12-16 23:26 ` [PATCH v4 1/3] dt-bindings: dma: snps,dw-axi-dmac: Add compatible string for Agilex5 Khairul Anuar Romli
2025-12-16 23:26 ` [PATCH v4 2/3] arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node Khairul Anuar Romli
2025-12-16 23:26 ` [PATCH v4 3/3] dma: dw-axi-dmac: Add support for Agilex5 and dynamic bus width Khairul Anuar Romli
2025-12-19 20:46 ` Rob Herring
2025-12-19 22:58 ` Romli, Khairul Anuar
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