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The boards intentionally stay on the in-tree DTS rather than CONFIG_OF_UPSTREAM because the upstream Linux Arria 10 device tree does not expose the clkmgr (and related) labels that arch/arm/dts/socfpga_arria10-u-boot.dtsi already references. 4/4 doc: socfpga: Describe Arria 10 SoCDK QSPI U-Boot and SPL build flow Document how to build SPL + U-Boot, assemble the default FIT images and lay them out on QSPI flash. Hardware tested --------------- - Intel Arria 10 SoCDK rev C, Cadence QSPI flash, SPL + U-Boot - Intel Arria 10 SoCDK rev C, Denali NAND flash, SPL + U-Boot Dependencies ------------ This series depends on three earlier U-Boot NAND prerequisite changes already posted to the list: 1) "mtd: nand: raw: Cadence NAND cleanup" series (2 patches) https://lore.kernel.org/u-boot/20260304032441.31558-1-dinesh.maniyam@altera.com/ 2) "mtd: rawnand: denali: add NAND_DENALI_SKIP_BBTSCAN_SPL Kconfig" https://lore.kernel.org/u-boot/20260625170153.2593-1-dinesh.maniyam@altera.com/ 3) "mtd: rawnand: allow SYS_NAND_BLOCK_SIZE when SPL_NAND_CADENCE is set" https://lore.kernel.org/u-boot/20260625170223.2963-1-dinesh.maniyam@altera.com/ Without (1) the SPL Cadence NAND build does not select the right MTD header and Kconfig dependencies; without (2)/(3) the new Arria 10 NAND defconfig cannot disable the Denali BBT scan in SPL or pick its own SYS_NAND_BLOCK_SIZE. Dinesh Maniyam (4): arm: dts: socfpga: Update Arria 10 SoCDK U-Boot handoff data ARM: socfpga: Add default FIT images for Arria 10 SoCDK arm: socfpga: Add Arria 10 SoCDK QSPI and NAND boards doc: socfpga: Describe Arria 10 SoCDK QSPI U-Boot and SPL build flow arch/arm/dts/socfpga_arria10-handoff.dtsi | 36 +-- ...ocfpga_arria10_chameleonv3_270_3_handoff.h | 250 +++++++------- ...ocfpga_arria10_chameleonv3_480_2_handoff.h | 250 +++++++------- .../socfpga_arria10_socdk_nand-u-boot.dtsi | 42 +++ arch/arm/dts/socfpga_arria10_socdk_nand.dts | 26 ++ .../dts/socfpga_arria10_socdk_nand_handoff.h | 305 ++++++++++++++++++ .../socfpga_arria10_socdk_qspi-u-boot.dtsi | 48 +++ arch/arm/dts/socfpga_arria10_socdk_qspi.dts | 11 + .../dts/socfpga_arria10_socdk_qspi_handoff.h | 305 ++++++++++++++++++ .../dts/socfpga_arria10_socdk_sdmmc_handoff.h | 262 +++++++-------- arch/arm/mach-socfpga/qts-filter-a10.sh | 22 +- .../altera/arria10-socdk/fit_kernel_nand.its | 44 +++ .../altera/arria10-socdk/fit_kernel_qspi.its | 44 +++ board/altera/arria10-socdk/fit_uboot.its | 43 +++ configs/socfpga_arria10_nand_defconfig | 95 ++++++ configs/socfpga_arria10_qspi_defconfig | 86 +++++ doc/README.socfpga_arria10_qspi_socdk | 56 ++++ include/configs/socfpga_arria10_socdk.h | 27 ++ 18 files changed, 1542 insertions(+), 410 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria10_socdk_nand-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_socdk_nand.dts create mode 100644 arch/arm/dts/socfpga_arria10_socdk_nand_handoff.h create mode 100644 arch/arm/dts/socfpga_arria10_socdk_qspi-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_socdk_qspi.dts create mode 100644 arch/arm/dts/socfpga_arria10_socdk_qspi_handoff.h create mode 100644 board/altera/arria10-socdk/fit_kernel_nand.its create mode 100644 board/altera/arria10-socdk/fit_kernel_qspi.its create mode 100644 board/altera/arria10-socdk/fit_uboot.its create mode 100644 configs/socfpga_arria10_nand_defconfig create mode 100644 configs/socfpga_arria10_qspi_defconfig create mode 100644 doc/README.socfpga_arria10_qspi_socdk -- 2.43.7