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From: Yang Wang <kevinyang.wang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <alexander.deucher@amd.com>, <hawking.zhang@amd.com>,
	<kenneth.feng@amd.com>
Subject: [PATCH 0/4] drm/amd/pm: refactor PPT limit runtime policy
Date: Fri, 31 Jul 2026 11:10:18 +0800	[thread overview]
Message-ID: <cover.1785467079.git.kevinyang.wang@amd.com> (raw)

PPT limit handling combines controller identity, AC/DC source, immutable
capabilities, PMFW runtime state, and persistent user policy in scalar
state. This prevents the driver from representing PPT0/PPT1 independently
and leaves user limits vulnerable to PMFW reset.

The runtime model requires separate ownership for each class of data:

- PPTable-derived ranges define normal and OD capabilities.
- PMFW messages and tables define the effective runtime limit.
- Common user-profile state defines persistent policy by source and
  controller.

The four patches establish these boundaries:

- Index common ranges by AC/DC source and PPT0/PPT1 controller; pass the
  controller through get and set callbacks.
- Account for PMFW protocols that represent an effective limit as a
  message base plus an OD percentage.
- Save user values and validity masks by source and controller; restore
  them after suspend and live AC/DC transitions.
- Restore the saved PPT policy after GPU reset reinitializes PMFW and the
  platform power table.

The resulting policy preserves explicit user limits without caching
mutable PMFW current values.

Yang Wang (4):
  drm/amd/pm: refactor PPT limits by controller and power source
  drm/amd/pm: account for OD percentage in effective PPT limits
  drm/amd/pm: refactor user PPT policy save and restore
  drm/amd/pm: restore user PPT limits after GPU reset

 drivers/gpu/drm/amd/pm/amdgpu_dpm.c           |   2 +-
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c     | 222 ++++++++++--------
 drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h |  63 ++---
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h  |  15 +-
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h  |  11 +-
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h  |  11 +-
 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h  |  11 +-
 .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c |  52 ++--
 .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   |  78 +++---
 .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c   | 122 +++++-----
 .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c    |  23 +-
 .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c  | 118 ++++------
 .../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c    |  93 ++++----
 .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c    |  23 +-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 123 ++++++----
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c  | 124 +++++-----
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 123 ++++++----
 .../gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c    |  23 +-
 .../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c  | 123 ++++++----
 .../gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c    |  23 +-
 .../drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c  | 122 +++++-----
 drivers/gpu/drm/amd/pm/swsmu/smu_internal.h   |   3 +-
 22 files changed, 792 insertions(+), 716 deletions(-)

-- 
2.54.0

             reply	other threads:[~2026-07-31  3:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-31  3:10 Yang Wang [this message]
2026-07-31  3:10 ` [PATCH 1/4] drm/amd/pm: refactor PPT limits by controller and power source Yang Wang
2026-07-31  3:10 ` [PATCH 2/4] drm/amd/pm: account for OD percentage in effective PPT limits Yang Wang
2026-07-31  3:10 ` [PATCH 3/4] drm/amd/pm: refactor user PPT policy save and restore Yang Wang
2026-07-31  4:57   ` Lazar, Lijo
2026-07-31  6:51     ` Wang, Yang(Kevin)
2026-07-31  7:45       ` Lazar, Lijo
2026-07-31  3:10 ` [PATCH 4/4] drm/amd/pm: restore user PPT limits after GPU reset Yang Wang
2026-07-31  3:57 ` [PATCH 0/4] drm/amd/pm: refactor PPT limit runtime policy Feng, Kenneth

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