[PATCH v4 0/6] cxl: Support mixed-granularity region interleaves

[Alison Schofield <alison.schofield@intel.com>]

RobertR: I've dropped the Originally-by tags since the implementation no
longer carries the selector-bit approach from your original patch. If
you think Patch 3 still warrants an authorship tag based on the origin
of the auto-region work, let me know.

Changes in v4:
- Rework port decoder setup around parent granularity and target count,
  dropping the selector-walk and selector-derived granularity machinery
  from v3 (RobertR)
- Replace the mixed-granularity-specific endpoint position handling with
  one weighted position calculation for existing and mixed-gran regions
- Derive mixed-gran port decoder settings directly from the parent interleave
  geometry
- Promote the user-region position self-test from dev_dbg() to dev_warn()
- Update the documentation patch
- Update the cover letter summary and series structure
Link to v3:
https://lore.kernel.org/linux-cxl/cover.1785444498.git.alison.schofield@intel.com/

Changes in v3:
- Reduce scope to coarse-to-fine ordering (RichardC, Sashiko)
- Reject out-of-order layouts (RichardC, Sashiko)
- P1: Factor the selector walk and per-port checks into helpers (RobertR)
  That pre-work is the new Patch 1/8 and the Series Structure section of
  this cover letter describe same below.
- P3: Derive granularity from the highest available selector span (RobertR)
- P3: Validate auto-programmed granularity against the derived value
- P4: Rename root_pos_stride() to root_positions_per_target() (RobertR)
- P4: Drop the "stride" terminology throughout (RobertR)
- The complex Patch 4 of v2 is split into patches 4-6 in v3.
  Also noted in the Series Structure section of cover letter below.
- P9: Move the peer-distance walk and per-function walkthroughs from the doc
  into in-code comments and kernel-doc (RobertR)
- Drop Reviewed-by tags
Link to v2:
https://lore.kernel.org/linux-cxl/cover.1781199122.git.alison.schofield@intel.com/

Changes in v2:
- Patch 1,2: Defer the unused selector var store to keep P1 bisectable (Sashiko)
- Patch 1: Make divide by 3 in get_selctor() work on 32-bit builds) (lkp)
- Patch 4: Use local vars in cxl_region_attach() for readability (DaveJ)
- Patch 5: Add NULL checks on unused mock arrays (Sashiko)
- Resolved errant err_rch unwind with rc7 merge (DaveJ)
- Rebase onto 7.1-rc7
- Update commit logs in 1,2,5 to align w changes in v2
Link to v1:
https://lore.kernel.org/all/cover.1780095671.git.alison.schofield@intel.com/


Begin Cover Letter:

A CXL region may interleave across multiple decoder levels: root,
optional switches, and endpoint. The driver has historically required
equal region and root decoder granularities. That blocks legal
mixed-granularity arrangements permitted by CXL 4.0 Section 9.13.1 and
makes some 6-way and 12-way configurations defined in Section 9.13.1.1
(Tables 9-6, 9-7, and 9-8) impossible to create.

Two prior proposals addressed parts of this gap:

AlisonS introduced position arithmetic and sysfs gating for auto and
user-created regions to support the 6- and 12-way interleave
configurations without a same-granularity alternative:
https://lore.kernel.org/all/20250306232239.2609017-1-alison.schofield@intel.com/

RobertR introduced an HPA selector-bit model for auto regions that
allows multi-level power-of-two interleaves regardless of granularity
ordering:
https://lore.kernel.org/all/20251028094754.72816-1-rrichter@amd.com/

This series adds support for CXL regions where interleave granularity
differs between levels of the decoder hierarchy. The support applies to
both firmware-programmed auto regions and user-created regions.

Linux supports mixed-granularity configurations that are monotonic from
the interleaving root toward the endpoints. Granularity may remain the
same or become finer at each interleaving level. Configurations that
refine and then become coarser are permitted by the CXL Specification
but are not supported by Linux.

This support includes all power-of-two interleaves, as well as the
3-, 6-, and 12-way interleave configurations described by CXL 4.0
Section 9.13.1.1.


Series structure - reworked in v4
---------------------------------
Patch 1 promotes the existing user-region endpoint position self-test to
a visible diagnostic.

Patch 2 generalizes endpoint position calculation to account for
granularity changes between decoder levels.

Patch 3 enables mixed-granularity auto regions and validates their
coarse-to-fine decoder geometry.

Patch 4 enables mixed-granularity user regions by relaxing the existing
root/region granularity restriction.

Patch 5 adds cxl_test topology and coverage for mixed-granularity regions.

Patch 6 documents the mixed-granularity model and Linux support policy.


A companion NDCTL patchset that allows mixed-gran 'cxl create-region'
and adds the unit test is posted here:
https://lore.kernel.org/all/fa5c109f08824180f58341ebd9055545a2ff3142.1780099216.git.alison.schofield@intel.com/


Alison Schofield (6):
  cxl/region: Warn on user region position mismatch
  cxl/region: Generalize endpoint position mapping
  cxl/region: Support mixed-granularity auto regions
  cxl/region: Support mixed-granularity user created regions
  cxl/test: Add a topology to test mixed-granularity regions
  Documentation/cxl: Describe mixed-granularity regions

 .../driver-api/cxl/linux/cxl-driver.rst       | 135 +++++
 drivers/cxl/core/region.c                     | 193 ++++---
 tools/testing/cxl/test/cxl.c                  | 496 ++++++++++++++++--
 3 files changed, 706 insertions(+), 118 deletions(-)


base-commit: db2ddb87143519e20a95aa36c60b36107b736a58
-- 
2.37.3