From: <vitaly.prosyak@amd.com>
To: <igt-dev@lists.freedesktop.org>
Cc: <simona@ffwll.ch>, <kamil.konieczny@linux.intel.com>,
<christian.koenig@amd.com>, <alexander.deucher@amd.com>,
<sebastian.brzezinka@intel.com>,
Vitaly Prosyak <vitaly.prosyak@amd.com>
Subject: [PATCH v6 0/2] Add GEM_CHANGE_HANDLE test
Date: Tue, 1 Sep 2026 21:03:15 -0400 [thread overview]
Message-ID: <cover.1788309579.git.vitaly.prosyak@amd.com> (raw)
From: Vitaly Prosyak <vitaly.prosyak@amd.com>
This series adds concurrency, edge-case, and functional coverage so
GEM_CHANGE_HANDLE behavior can be validated across lifetime races,
address-space diversity, and boundary inputs before kernel-side enablement.
The ioctl is disabled for security reasons, but it also lacked a systematic
IGT testing process for corner cases and races.
To re-enable it:
1. Land working IGT tests for the corner cases and races; this series
addresses that request.
2. Handle `idr_preload` in the kernel and kernel-internal tests; this does
not belong in IGT.
3. Define and validate `handle == 0` semantics; this series adds the
corresponding IGT coverage.
4. Define and validate `handle == new_handle` semantics; this series adds
the corresponding IGT coverage.
Requirement-to-subtest mapping:
* Requirement 1 (corner cases and races): race-change-vs-close,
race-change-vs-change, race-change-vs-prime,
race-aggressive-change-vs-close, race-exploit-single-thread,
race-exploit-random-handles, race-close-before-lock, object invalid race
to random offsets, set/get race for random handles, all vmas race to
random offsets, all ppgtt race to random offsets, and all objects race to
random offsets.
* Requirement 2 (`idr_preload`): this is kernel/internal work and has no IGT
subtest in this series.
* Requirement 3 (`handle == 0` semantics): invalid-object/invalid-input
coverage in this series, including object invalid race to random offsets.
* Requirement 4 (`handle == new_handle` semantics): same-handle/no-op and
functional rename coverage in this series, including set/get race for
random handles.
Review feedback addressed:
* Kamil feedback: patch-by-patch buildability is maintained.
* Sebastian feedback: GEM_CHANGE_HANDLE is currently wired to
drm_invalid_op; prerequisite IGT coverage is provided before kernel-side
enablement.
* dmesg precondition: require_dmesg_access() prevents dmesg-based validation
without access.
* arm64 portability: the sched_yield path avoids the x86-only pause mnemonic
issue.
* checkpatch cleanup status: style cleanups were applied; known
volatile-related warnings remain.
--
2.54.0
next reply other threads:[~2026-09-02 1:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 1:03 vitaly.prosyak [this message]
2026-09-02 1:03 ` [PATCH v6 1/2] tests/intel: Add gem_change_handle_race test suite vitaly.prosyak
2026-09-02 1:03 ` [PATCH v6 2/2] tests/intel/gem_change_handle_race: Add edge-case and functional subtests vitaly.prosyak
2026-09-08 17:34 ` [PATCH v6 0/2] Add GEM_CHANGE_HANDLE test vitaly prosyak
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1788309579.git.vitaly.prosyak@amd.com \
--to=vitaly.prosyak@amd.com \
--cc=alexander.deucher@amd.com \
--cc=christian.koenig@amd.com \
--cc=igt-dev@lists.freedesktop.org \
--cc=kamil.konieczny@linux.intel.com \
--cc=sebastian.brzezinka@intel.com \
--cc=simona@ffwll.ch \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.