From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj2-f12.google.com (mail-pj2-f12.google.com [74.125.227.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 30EF048A2D1 for ; Mon, 21 Sep 2026 11:15:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.227.140 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789989345; cv=none; b=n+1fhwN0CemVHoFr1SZKI+lLdmLQeRz8d5FH/Be7HAErQfG973eBvYDi7aGF/o+uxe7T5R1Ah2GUa7EqEhD4NfpZ6F92N3itv1Ib+Yzni323IUuQQyS1XFSXCqeUsNz8NhMdqtAbYcdyD6X6WbB23TZ+nbhpj2MVeBbkTjVgnb0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789989345; c=relaxed/simple; bh=gXFNVmI4K+3a0pQ+szi1sYs/m7S1n/B5DwNQg2yVXss=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=ZvMTmX0BOKcP2Gwui6yqaAjDdSuX/psDqu2PUw1BP4D0FNbbM8zfZBiJzdLTU9kMNLpIginEoacF9Ijj/cBqBDjvgYbFJWv62drdAlHYY4Cw1Otj6SOSLMyQ21OYZHgYSGFUsQfD8pOnykjy+CRpGfFivyPfO77wMYfxqJsm9q8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com; spf=pass smtp.mailfrom=bytedance.com; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b=dkNVRb8P; arc=none smtp.client-ip=74.125.227.140 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bytedance.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b="dkNVRb8P" Received: by mail-pj2-f12.google.com with SMTP id d9443c01a7336-2d747ed9866so25979515ad.2 for ; Mon, 21 Sep 2026 04:15:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance.com; s=google; t=1789989341; x=1790594141; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:message-id:date :subject:cc:to:from:from:to:cc:subject:date:message-id:reply-to :content-type; bh=F/VYXLvtLlQdqDfxHNXMqFFkNsNMnKFZyiWvN4seav0=; b=dkNVRb8P/eDmo1K2J7Rke5KwXZcXqkCaDJ7W287m9zTaXv9DvPpC5QrxpVhdp1zCGt nZYnXf545ESPLBUmXJHihC+NTWvE4DyhInEnz+GGb2Rn+q+SSdCZnss3I7+dJCzFxgnh TcZ7EzIx6ZfgH4sq04iMvX+aAU68BuWdQvE8llqLw5w9gNVEkWb6okuvLcLqFCRBj26Z Xm9PEOaGx2RBYI5hs99FsUyZdaEmHeVXxPS3vK8kY+ukWu9uQipUPrTTuU0aOMS6HX1A ZmGPOA6b5aO0gr1qpPeAYyBvtQUztR0yI0o73Qey0gTEaay1aau66wAuUVBuPt9CkZ37 AXFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789989341; x=1790594141; h=content-transfer-encoding:content-type:mime-version:message-id:date :subject:cc:to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to:content-type; bh=F/VYXLvtLlQdqDfxHNXMqFFkNsNMnKFZyiWvN4seav0=; b=TYvOOcuMHXSGEAXMadsVaBDs18YeCsGQA1474hTmnstbWfwFP4ORyBWlVMpi182jQg w5UmpOa6cPc/IAqOwlmI3pTQlPJS7xGb4/rxhJx2UNk7nDbtEJ9Q1dhoG2JL9P7Yx5il d8ddCdQYjOFgoULGl05DWgsK2nytZSxecW3kpPkLUL+yC77eCRjVbJi5RBG1nFNmcSCd 5KcKfReTX0LbLVVmVAtbhcw9LAy2ct2dtBPCphaQuqi/xvJLCOWyVfCtXb3p2M8ww270 XYADdOSu7PLT6+CaYKV779C+Cp0WHHEOcrgXEm2z8FK4nF0yKx9Iu263RNRvmPQC1HC+ 79wg== X-Forwarded-Encrypted: i=1; AKwUvBzHWlXSJXawu39H6CH26h9/XT6dRPUeSw4Dw6AlYUOrVGQkXy+y3aoqhe+ILegB3vnirQz+jHBH8NItv1pFEEq9@vger.kernel.org X-Gm-Message-State: AFuF++k4tp8Ljo5+fQhdbXksReqR8kTRqMgzd3wwFHVQy/Y2giWTnawX rEnnZYuAhCi2VIM6YmeyY/BlcLx9tZOvROedcPK0zAszyGvYbFtOGyxW1cPYEHi3e0U= X-Gm-Gg: AYBFou1zKGOq6pacsNySc+R0YRqempgsAywg1yIIE2CGh2Vlb8KWVXNoJzr4oIH9ONN MExw9MlhXOkHoNHKFIJqxmnQLB/EA324RXgt//STsbFM0gI6EUWhzDhZ/HOa/YqQh3cd6luGjdj CZ3mZGPKgBPeVLOxI06Q/7SZCOHs95SaEMFySHyLQTPjLZX3d13UHxzlHWH7z39PeNN8RZy2kbk OLFY5j3yQw4ec1VXMpZReZRE7crd92iLFJCCc6FTFRTzNmpDt5swUeU9ihD35J9GaO5wUiQy2dl an+ytHn9Wh1dtASEJuMVj/M7Tlf2T2ixe7cDTobYGM+u0KHTmiW1tT3ZKzazQz7ktsdMS3dFE+B XmJOQ9DTK5yiXNfO9tSLsWOd9VPBgPMbbTPKHt2CDT9AFvYRjhFvzLYQgfKYJ31vPpbHM6bUuI7 5b1Rpqp69z0jMtOXMGhERdle4Pln72grh7SZhf7fPYdr5yF63S6h9k0nRdFn64VZkUcdbwqXv8F VTQ+YXcLiBNQsITBQRqRRavrjQFLtXtpvo= X-Received: by 2002:a17:902:7209:b0:2dd:c100:a5dd with SMTP id d9443c01a7336-2ddc100a681mr63094355ad.49.1789989340704; Mon, 21 Sep 2026 04:15:40 -0700 (PDT) Received: from FJ7FR2JRQ3.bytedance.net ([240e:694:e20:401::8]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ddc17ba651sm31831125ad.53.2026.09.21.04.15.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 21 Sep 2026 04:15:39 -0700 (PDT) From: Zhanpeng Zhang To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Himanshu Chauhan , Conor Dooley , Anup Patel Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Yunhui Cui , Atish Patra , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , Will Deacon , Thomas Gleixner , Jonathan Corbet , Randy Dunlap , Shuah Khan , Shuah Khan , Yuanzhu , Yicong Yang , Susheng Yang , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Zhanpeng Zhang Subject: [PATCH v10 RESEND 0/9] riscv: add SBI Supervisor Software Events support Date: Mon, 21 Sep 2026 19:14:57 +0800 Message-ID: X-Mailer: git-send-email 2.50.1 Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is v10 rebased onto v7.3-rc4, as a base for the RAS work requested by Himanshu. No additional fixes or features are included. Only patch 7 needed adaptation: keep the upstream counter-mask bitmap conversion and snapshot NULL-check ordering, and adapt the SSE stop-all helper and early counter-mask initialization to the bitmap representation. The fast-only GUP user-stack copy remains unchanged. Rebase validation: RV64 defconfig with SSE, PMU-SSE, CPU PM and kexec enabled builds Image, modules, the SSE test module and the user-stack selftest. The SSE, trap, fault and PMU objects also build for RV32. The exported series applies cleanly to v7.3-rc4 and reproduces the branch tree. On EVB247, the Debian-packaged rc4 kernel boots via kexec with its matching initrd and modules. The SSE framework and priority tests, all four stress layers in stress=1, and both user-stack selftests pass. The latter includes 32 concurrent samplers. No new kernel errors were observed. Unavailable injection events were skipped by the framework test; KVM was disabled in this test configuration, so virtualization was not retested. The functional results below are retained from the original v10 and are not claims of runtime validation on this rebased kernel. RISC-V does not architecturally define a supervisor-mode non-maskable interrupt (NMI). An interrupt that arrives while Linux has cleared SIE stays pending and is not observed until interrupts are enabled again. That is correct for ordinary interrupt handling, but some kernel work needs an NMI-like notification that can run even inside an interrupt-disabled region: sampling a PMU overflow at the instruction that caused it, or taking a high-priority RAS report promptly, cannot wait for the next unmask boundary. The SBI Supervisor Software Events (SSE) extension [1] fills this gap. It lets Linux register handlers for events that the SBI implementation can deliver ahead of ordinary traps and interrupts, giving RISC-V the NMI-like supervisor notification mechanism it otherwise lacks. SSE can carry several event sources: high-priority RAS reports, double traps, and PMU overflow, with room for further standard and platform events. This series focuses on PMU overflow, its first user. Delivering overflows through SSE lets perf sample the code that was actually running while interrupts were disabled, rather than the later point where execution reached an interrupt-unmask boundary. This series implements the Linux side of that interface: the architecture entry machinery, a firmware driver that exposes SSE events to in-kernel clients, PMU overflow delivery, and regression tests. Per-hart local events and system-wide global events share one client API. SSE delivery model ================== Linux first registers a handler and an event stack with the SBI implementation, then enables the event. When an event source is signalled, the M-mode SBI implementation preempts Linux even in an interrupt-disabled region: it saves the interrupted supervisor state and constructs an S-mode context that enters the registered handler. Linux can now run its own handler, for example to take a perf sample or process a RAS report, then completes the event with another SBI call, allowing the interrupted context to resume. The typical hardware-triggered delivery flow is (software-injected events skip the hardware trigger): <--------- Linux kernel -----------> <-- Firmware ---> <- Hardware -> interrupted context SSE handler OpenSBI Hardware | | | | [1] setup | |-register & enable--> | | | | | [2] trigger | | <----trigger------| | | | | [3] save | | +--------------+ | | | | context save | | | | +--------------+ | | | | | [4] inject | | +-----------------------+ | | | | handler context setup | | | | +-----------------------+ | | <---inject (mret) ---| | | | | | [5] handle | +----------------+ | | | | event handling | | | | +----------------+ | | | | | | [6] complete | |-----complete-------> | | | | | [7] restore | | +-----------------+ | | | | context restore | | | | +-----------------+ | | | | | [8] resume <------------resume (mret) ------------| | | | | | The context used to enter the handler exists only for this handoff; it is not the task context that the event interrupted. The architecture entry code joins the two sides: it moves execution onto the event's dedicated stack and shadow call stack, establishes the current task, and presents the interrupted registers to the callback as a normal pt_regs. Clients can therefore operate on the original interrupted context without depending on the firmware entry details. Linux implementation ==================== An SSE handler runs in NMI-like context: it must not sleep, must not take a page fault, and may interrupt code that holds arbitrary locks or is partway through kernel entry. The implementation is shaped by those constraints. Because it is NMI-like, an SSE can arrive at any point where interrupts are disabled, including while Linux is midway through exception entry, a task switch, or a KVM guest transition, where the normal kernel entry state is only partially established. The SSE entry wrapper (the architecture assembly that runs before the client callback) copes with this: it preserves Linux-owned stvec, hstatus, and task stack metadata across the handler and any nested exception, and its earliest instructions, which run before the event stack and current task are set up, are kept outside kprobe instrumentation. The callback receives the interrupted registers as a pt_regs and is allowed to edit them. On RISC-V a6 and a7 carry SBI call arguments and results, so a callback that wants to influence an in-flight SBI call the event interrupted edits them there. The entry wrapper copies just a6 and a7 from that pt_regs back into the context handed to the completion SBI call, so the edit takes effect when the interrupted code resumes; the rest of the interrupted state is restored by firmware and left untouched. The firmware driver maps the SBI event state machine onto kernel resource ownership. A callback, stack, and attribute buffer stay alive until firmware has removed every registration that can refer to them. Failed partial operations remain tracked for later cleanup, an aborted CPU-offline operation restores the requested event state, and shutdown and kexec mask SSE before Linux stops servicing handlers. PMU overflow and perf ===================== The RISC-V SBI PMU driver delivers overflows through ordinary interrupts by default. When firmware implements SSE and the local PMU-overflow event, the driver routes overflows through SSE instead. The choice is made once at setup and is not switched at runtime; an operational failure disables sampling rather than risking two active routes for the same overflow. This changes where perf can observe an overflow, not how applications use perf. A normal PMU interrupt raised while S-mode interrupts are masked is handled only once they are enabled again, so the resulting sample often points at the unmask boundary rather than at the code that consumed the cycles. SSE can enter Linux at the original point and remove that source of sampling bias. No new perf option or perf.data format is introduced. The entry code supplies the interrupted pt_regs needed for register samples and for kernel and user callchains. DWARF callchains additionally require a copy of the interrupted user stack. Since an SSE handler cannot take a normal page fault, this series takes a temporary reference to the resident user pages with fast-only GUP, copies them through their kernel mappings, and truncates the sample at the first page that is not immediately available. The existing in-atomic copy remains unchanged outside SSE context. The PMU integration retains perf's throttling and stopped-event semantics. It restarts only runnable counters and orders the CPU power-management callbacks so that counters cannot resume after a hart has failed to restore its SSE delivery path. Hardware results ================ We measured this on a RISC-V server platform. The same kernel source and perf binary were used for both routes; one delivered PMU overflows through ordinary interrupts and the other through SSE. The table shows the mean of three runs of three million single-CPU "perf bench sched pipe" operations. The "ops/s" columns are workload throughput (higher is better, so they show the profiling overhead); the "samples/s" columns are the sampling rate perf actually achieved against the requested -F frequency: rate IRQ ops/s SSE ops/s delta IRQ samples/s SSE samples/s -F 99 337,707 339,555 +0.55% 98.0 98.6 -F 999 338,352 338,289 -0.02% 995.7 998.0 -F 5000 329,002 333,034 +1.23% 5001.7 5001.6 There were no lost samples. Across these normal frequency settings, both delivery modes reached the requested sample rate and workload throughput differed by no more than 1.23%. The "perf bench sched pipe" workload also shows why the delivery mechanism matters to the resulting profile. Ordinary PMU interrupts cannot enter an interrupt-disabled kernel critical section. Overflows raised there remain pending until interrupts are enabled again. Samples consequently accumulate at the enable boundary rather than at the code that consumed the cycles. In the IRQ profile, finish_task_switch() and _raw_spin_unlock_irqrestore() therefore accounted for 54.99% of all samples. SSE can enter Linux while S-mode interrupts are disabled. The PMU-SSE profile therefore samples inside those critical sections and exposes the scheduler, locking, address-space switching, and wake-up paths doing the actual work. The leading entries from the two -F 999 reports show the difference. With ordinary PMU interrupt delivery: overhead symbol 36.63% finish_task_switch.isra.0 18.36% _raw_spin_unlock_irqrestore 7.66% __internal_syscall_cancel 7.55% do_trap_ecall_u 4.19% mutex_lock 3.64% mutex_unlock 3.06% exit_to_user_mode_loop With PMU-SSE delivery: overhead symbol 5.48% __kprobes_text_end 5.29% __schedule 5.10% ret_from_exception 4.71% do_raw_spin_lock 4.01% do_trap_ecall_u 3.99% mutex_lock 3.66% switch_mm 3.43% mutex_unlock 3.29% exit_to_user_mode_loop 3.28% psi_group_change The ordinary interrupt profile is dominated by two interrupt-enable boundaries. With SSE, those two entries account for only 3.37%. The samples are instead distributed across scheduler paths within the critical sections. At perf's configured limit of 100,000 samples per second, both routes still made progress without lost samples. In this deliberately saturated regime SSE reduced workload throughput by 2.7% to 5.8%, which exposes the additional firmware-entry cost and marks a practical upper boundary for sampling. Thirty-second perf top runs at the same rate each processed about 3.1 million samples with no loss, stalls, or kernel failures. The DWARF callchain path gets dedicated coverage because it was the source of the corruption this series fixes. On the same platform, "perf record -a -g --call-graph dwarf,512 -F 999" layered on a concurrent "hackbench -g25 -l600" -- the configuration that previously corrupted spinlocks and mutexes under SSE -- now completes cleanly, with no lost samples, lockups, RCU stalls, or faults, including a 431-iteration soak. Patch 9 adds a regression test that drives the non-faulting user-stack copy through the SSE handler with 32 concurrent samplers and checks perf's truncation semantics. Changes in this resend ====================== This resend only rebases v10 onto v7.3-rc4. The only merge conflict was in patch 7, due to the upstream PMU counter-mask bitmap conversion. In v11, I will address the Sashiko review feedback and improve user-stack copying with an NMI-safe interface similar to x86's copy_from_user_nmi(). Changes in v10 ============== V10 turns the earlier feature series into a path suitable for sustained perf use. In particular, it: - reconstructs and publishes the interrupted context for perf register samples and kernel and user callchains; - preserves current, task stack metadata, stvec, hstatus, and shadow-call stack state across synthetic entry and nested exceptions; - prevents fault-disabled accesses from entering the generic RISC-V page fault path and provides a non-faulting SSE user-stack copy; - makes event lifetime and rollback explicit across partial firmware operations, CPU hotplug, shutdown, crash, and kexec; - closes PMU throttle, counter restart, CPU power-management, and cleanup races without adding a runtime SSE-to-IRQ transition; and - expands the framework stress coverage and adds a regression test for high-frequency DWARF user-stack sampling. Changes in v9: - Rebased the original series onto RISC-V for-next. - Preserved Linux-owned trap, virtualization, and supervisor state across the synthetic SSE handler. - Added framework stress modes and updated MAINTAINERS. Previous versions: v9: https://lore.kernel.org/r/cover.1778331862.git.zhangzhanpeng.jasper@bytedance.com v8: https://lore.kernel.org/r/20251105082639.342973-1-cleger@rivosinc.com How to test =========== Enable the SSE framework and SSE overflow delivery: CONFIG_RISCV_SBI_SSE=y CONFIG_RISCV_PMU_SBI=y CONFIG_RISCV_PMU_SBI_SSE=y PMU-SSE also requires two OpenSBI fixes: f30a54f3b3a0 ("lib: sbi: pmu: Remove MIP clearing from pmu_sse_enable()") [2], included since OpenSBI v1.7, which keeps an overflow pending while its SSE event is temporarily disabled; and 35511bc6ee1c ("lib: sbi: sse: clear SPV for non-virtualized events") [3], not yet included in a tagged release, which stops a stale HSTATUS.SPV from being applied to a non-virtualized event. Build tools/testing/selftests/riscv, then run: for stress in 0 1 2; do ./run_sse_test.sh stress=$stress || break done ./sse_perf_ustack Useful perf regression workloads include: perf record -e cycles -a -- sleep 1 perf top perf record -g -F 999 -- hackbench perf record --call-graph dwarf,8192 -F 999 -- hackbench perf record -a -C 3 -e cycles -F 999 -- \ taskset -c 3 perf bench sched pipe -l 3000000 Limitations and follow-up work ============================== This series does not yet deliver SSE events into a guest or unwind a guest stack; a later KVM-SSE series will let the host receive an event from firmware and inject the corresponding event into the guest. Hibernation and crash kernels are unsupported: the current SBI interface cannot reconstruct firmware registrations after an image is restored, and a crash kernel cannot take over the registrations left by the crashed kernel, so it leaves SSE masked. [1] https://docs.riscv.org/reference/sbi/ext-sse.html [2] https://github.com/riscv-software-src/opensbi/commit/f30a54f3b3a091c225a00476f4039bf399badd1f [3] https://github.com/riscv-software-src/opensbi/commit/35511bc6ee1c9c17b6a89b44c52e2044bb51b979 Acknowledgements ================ The original five feature patches were developed by Clément Léger and Himanshu Chauhan. Thanks to Susheng Yang for reporting the perf callchain failure and for providing a workload that made it reproducible. Sorry for keeping you waiting. Since v9 I spent a good deal of time hardening the lifecycle and error paths and reproducing and analysing the bugs that only show up in the callchain path, until the series finally passed both functional and sustained stress testing on hardware. I am confident in v10, but, echoing Clément, SSE is a genuinely complex feature: it adds a new NMI-like entry path into the kernel to stand in for a hardware NMI. I would therefore welcome wider community testing and feedback, especially under high-frequency delivery and more complex handlers. --- Clément Léger (5): riscv: add SBI SSE extension definitions riscv: add support for SBI Supervisor Software Events extension drivers: firmware: add riscv SSE support perf: RISC-V: add support for SSE event selftests/riscv: add SSE test module Zhanpeng Zhang (4): riscv: sse: mask events during shutdown and kexec riscv: mm: avoid enabling interrupts for nofault page faults perf: RISC-V: support callchains with SSE delivery selftests/riscv: add perf user-stack SSE copy regression test Documentation/arch/riscv/index.rst | 1 + Documentation/arch/riscv/pmu-sse.rst | 55 + MAINTAINERS | 22 + arch/riscv/include/asm/asm.h | 14 +- arch/riscv/include/asm/perf_event.h | 10 + arch/riscv/include/asm/sbi.h | 63 + arch/riscv/include/asm/scs.h | 7 + arch/riscv/include/asm/sse.h | 82 ++ arch/riscv/include/asm/thread_info.h | 1 + arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/asm-offsets.c | 14 + arch/riscv/kernel/entry.S | 14 + arch/riscv/kernel/machine_kexec.c | 11 + arch/riscv/kernel/perf_callchain.c | 142 ++ arch/riscv/kernel/reset.c | 18 + arch/riscv/kernel/sbi_sse.c | 246 ++++ arch/riscv/kernel/sbi_sse_entry.S | 226 +++ arch/riscv/kernel/smp.c | 17 + arch/riscv/mm/fault.c | 11 +- drivers/firmware/Kconfig | 1 + drivers/firmware/Makefile | 1 + drivers/firmware/riscv/Kconfig | 18 + drivers/firmware/riscv/Makefile | 3 + drivers/firmware/riscv/riscv_sbi_sse.c | 1228 +++++++++++++++++ drivers/perf/Kconfig | 11 + drivers/perf/riscv_pmu.c | 14 +- drivers/perf/riscv_pmu_sbi.c | 540 ++++++-- include/linux/cpuhotplug.h | 1 + include/linux/perf/riscv_pmu.h | 20 +- include/linux/riscv_sbi_sse.h | 95 ++ tools/testing/selftests/riscv/Makefile | 2 +- tools/testing/selftests/riscv/sse/Makefile | 10 + .../selftests/riscv/sse/module/Makefile | 22 + .../riscv/sse/module/riscv_sse_test.c | 1154 ++++++++++++++++ .../selftests/riscv/sse/run_sse_test.sh | 59 + .../selftests/riscv/sse/sse_perf_ustack.c | 564 ++++++++ 36 files changed, 4599 insertions(+), 99 deletions(-) create mode 100644 Documentation/arch/riscv/pmu-sse.rst create mode 100644 arch/riscv/include/asm/sse.h create mode 100644 arch/riscv/kernel/sbi_sse.c create mode 100644 arch/riscv/kernel/sbi_sse_entry.S create mode 100644 drivers/firmware/riscv/Kconfig create mode 100644 drivers/firmware/riscv/Makefile create mode 100644 drivers/firmware/riscv/riscv_sbi_sse.c create mode 100644 include/linux/riscv_sbi_sse.h create mode 100644 tools/testing/selftests/riscv/sse/Makefile create mode 100644 tools/testing/selftests/riscv/sse/module/Makefile create mode 100644 tools/testing/selftests/riscv/sse/module/riscv_sse_test.c create mode 100644 tools/testing/selftests/riscv/sse/run_sse_test.sh create mode 100644 tools/testing/selftests/riscv/sse/sse_perf_ustack.c base-commit: 93f51579e7df248780214094418f205253383cc5 -- 2.50.1 (Apple Git-155) From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C68AC982E1 for ; Mon, 21 Sep 2026 11:16:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=wxS14wHR+Rl8k+ukyMDSsMtOwO+pxOIifzrVRZG2YYo=; b=VCPjOvBCYtSfs8 tE2OhwwxGG56IEY63aCIXEHawnict2bJIb1pW4W5GoH3B3y7PvGlyUmN8uAfRFUH3raTWgD8AEsYH xy2L8epNAEWO2fdOY36yQhKyEwyVUyUuau05TV5QFb3BZgiceCPL6cp82a2zekDhsa4v7hr1moLZx NE3OmZzQIixMqH9V0tgQxFV+ffigt7W3Un7I75xi5AGgvrqDHa8HjFDty7pyQCcWZVG7QBusrOaD4 kbcPLYdsFHkFvOR4P7v8aoZ3PQ1kpVl94uvpWNCxSEXul7G+7H3LzgBW1lgxzeHWbBobPrDNX9w3q cc+FHRUHI+ia42nrUfcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8c0I-00000001r1G-2Ads; Mon, 21 Sep 2026 11:16:10 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8c0C-00000001qzI-3IWd for linux-riscv@bombadil.infradead.org; Mon, 21 Sep 2026 11:16:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:Content-Type :MIME-Version:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:In-Reply-To:References; bh=F/VYXLvtLlQdqDfxHNXMqFFkNsNMnKFZyiWvN4seav0=; b=V4sEPgPD/SkBjHLUgefSzr94mB 6P5x2jwCXqk4tGcFvxuEUbbBO9GLZRcMQcRO+nBbDRJkRHLMKnrrCqQvWg8i2Siosovy2W76PUhHc +De2mlfvhjPYtAhZcUPPtthNU0KcC1+t1TW7Oyhx8bKPZSVqmBuwJAIiW/kU5zV03Ur/bwIHBdXbw JKKlF7YzVEo5qZ/ReI9v6NWL7DEnGTH/pyOuBkpW8vdvdQzC+mik4cO/5vY9LgMSJcUC6Xv6/yPqw +mFN8RmSx/iNFTE89jwX/RGFoE2Q5ULnS0M9YTdt7vCojKCrEPiMmLUFcRxMX+M0xwueGRyOBIstI NsKhGUJw==; Received: from mail-pj2-x0f.google.com ([2607:f8b0:4864:39::f]) by desiato.infradead.org with esmtps (Exim 4.99.2 #2 (Red Hat Linux)) id 1x8bzy-0000000CBH1-1HDn for linux-riscv@lists.infradead.org; Mon, 21 Sep 2026 11:16:03 +0000 Received: by mail-pj2-x0f.google.com with SMTP id d9443c01a7336-2d90ba1d807so33997815ad.3 for ; Mon, 21 Sep 2026 04:15:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance.com; s=google; t=1789989341; x=1790594141; darn=lists.infradead.org; h=content-transfer-encoding:content-type:mime-version:message-id:date :subject:cc:to:from:from:to:cc:subject:date:message-id:reply-to :content-type; bh=F/VYXLvtLlQdqDfxHNXMqFFkNsNMnKFZyiWvN4seav0=; b=ggi6C4c1AU/lfahNSFkuWlKH8poqm4/u+nu+LeOQfq+GdOU3SCy+030iHLHW6jveZ+ haaWB1infNYbYIODFxmXiAj7WVC7MVsyeXpT460rQ94fbzeCX11QQf4iZeogHjgYu28w UfXOSLQ6oqqkRfxk7gKA3AlQnLB0KxtNQOYnwYe2rdXInyL/u1LqZ11XGLbyoNZLBsmI pzsm8dIbFrawFszQe4z5zcACszdRpbcbcwIknTsw+JvTQobmRObjwy+HQyUnrCh7zLb9 3Uz+gHHjhvNzaMoA+uKmZ44dtk8jXP9HrrfqaMIew2S3/g2qqfyNexkdmKta3cpGzL/A gQ7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789989341; x=1790594141; h=content-transfer-encoding:content-type:mime-version:message-id:date :subject:cc:to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to:content-type; bh=F/VYXLvtLlQdqDfxHNXMqFFkNsNMnKFZyiWvN4seav0=; b=fiZQkCIy4l2QRBwB8LPTRGOx2BWiqOm/wVUZAoPZ8JLWTXHS5aiYuJ+kyGc8dcgulJ 4K+Oln6Z4iWD5fyrVoOuAuZnHOH/1AKWy6z18g68abHCIQAFpzbfrmMy6p7bbALnBKzo yPrd89kFrCU1qE4m/uVFqRz+i1F38YXAhyUE8doxxxz18Ct4Z6sv9FGN46scBcpAeG9h VRGzwoTdPEzx7aZqwxQmoMZx3LRwqV2JZ97NHR/AGKRr/s5BjMApzTx/As9+zFSE8OqQ V2IlFelpVdVHsI/sM/6EVvKDokiqpeSECHAqYrWKN3mmCKCJoRsQ+E4ISreaNnkjK4di CuXQ== X-Forwarded-Encrypted: i=1; AKwUvByrlu04WxswB4fibXQYI3B0rNfgl0WwnIwAPZu9a2AqjKW7uCfwCiemEm+R4KbmrZGvgWsmwPvdC6dScQ==@lists.infradead.org X-Gm-Message-State: AFuF++kokCinuWEa5uTooJJJxqV+2nMeZkDFVDjUud0FekWAuxH2KCCR ays63UrMTcIaqADs7PoIFSkXF1gufguwdHhuhsyiA7EK7tqTQmB710PoZHZ6Q3yxK7I= X-Gm-Gg: AYBFou33xzz/ThzVq6Lx762xJzSex8vA9Kulai+w1V1NadWvhmLFfWyqqTF7KLHBZ6d jEodqQqXR7F+MQhRaoCK6KdmzJZteaUyLSYGxkXyWMES6z/MIOmJMu/SqXSORIo82rKJ95PTnlq pO2pKc+dcQYbCPm9eTv2HUhqk152MM02u4p3MgNxDcTrAQGUPY/6UAv4w86ZZKhk+CopEwLmPUb 4rBIcU8FW2KQSPmJU0XjeajcxRrjF+cC9QR54Z5aXeoMDLd9WvPr57dHAsa7aSfXXjW34HTPVEc jD3+iYNDuVO0AT9kui/K0nOMTeOujfYGcF5ltbdsq9qPCI6PyxXBKOLBHmZ03JD7IIu9LFFK2Ye cJ1lg9w+iD668ekhrEwaHNdNegltxfLBkipy9zimCvoTRYji5kmtfOURj3Ru6sBUbJCsS96p59N poSxRvrGbdRlZ7nj3oFcIwHbvJADLkUPfueXsaOxgMPNWiM26nBhT3eqUjmqM6Fx8T8qsD/vmdA PpKXkjSz6KqzAR8imPCZHjdzXeY8rtdiwA= X-Received: by 2002:a17:902:7209:b0:2dd:c100:a5dd with SMTP id d9443c01a7336-2ddc100a681mr63094355ad.49.1789989340704; Mon, 21 Sep 2026 04:15:40 -0700 (PDT) Received: from FJ7FR2JRQ3.bytedance.net ([240e:694:e20:401::8]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ddc17ba651sm31831125ad.53.2026.09.21.04.15.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 21 Sep 2026 04:15:39 -0700 (PDT) From: Zhanpeng Zhang To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Himanshu Chauhan , Conor Dooley , Anup Patel Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Yunhui Cui , Atish Patra , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , Will Deacon , Thomas Gleixner , Jonathan Corbet , Randy Dunlap , Shuah Khan , Shuah Khan , Yuanzhu , Yicong Yang , Susheng Yang , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Zhanpeng Zhang Subject: [PATCH v10 RESEND 0/9] riscv: add SBI Supervisor Software Events support Date: Mon, 21 Sep 2026 19:14:57 +0800 Message-ID: X-Mailer: git-send-email 2.50.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260921_121559_885457_7FCFEE02 X-CRM114-Status: GOOD ( 26.26 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org VGhpcyBpcyB2MTAgcmViYXNlZCBvbnRvIHY3LjMtcmM0LCBhcyBhIGJhc2UgZm9yIHRoZSBSQVMg d29yayByZXF1ZXN0ZWQKYnkgSGltYW5zaHUuIE5vIGFkZGl0aW9uYWwgZml4ZXMgb3IgZmVhdHVy ZXMgYXJlIGluY2x1ZGVkLgoKT25seSBwYXRjaCA3IG5lZWRlZCBhZGFwdGF0aW9uOiBrZWVwIHRo ZSB1cHN0cmVhbSBjb3VudGVyLW1hc2sgYml0bWFwCmNvbnZlcnNpb24gYW5kIHNuYXBzaG90IE5V TEwtY2hlY2sgb3JkZXJpbmcsIGFuZCBhZGFwdCB0aGUgU1NFIHN0b3AtYWxsCmhlbHBlciBhbmQg ZWFybHkgY291bnRlci1tYXNrIGluaXRpYWxpemF0aW9uIHRvIHRoZSBiaXRtYXAgcmVwcmVzZW50 YXRpb24uClRoZSBmYXN0LW9ubHkgR1VQIHVzZXItc3RhY2sgY29weSByZW1haW5zIHVuY2hhbmdl ZC4KClJlYmFzZSB2YWxpZGF0aW9uOiBSVjY0IGRlZmNvbmZpZyB3aXRoIFNTRSwgUE1VLVNTRSwg Q1BVIFBNIGFuZCBrZXhlYwplbmFibGVkIGJ1aWxkcyBJbWFnZSwgbW9kdWxlcywgdGhlIFNTRSB0 ZXN0IG1vZHVsZSBhbmQgdGhlIHVzZXItc3RhY2sKc2VsZnRlc3QuIFRoZSBTU0UsIHRyYXAsIGZh dWx0IGFuZCBQTVUgb2JqZWN0cyBhbHNvIGJ1aWxkIGZvciBSVjMyLgpUaGUgZXhwb3J0ZWQgc2Vy aWVzIGFwcGxpZXMgY2xlYW5seSB0byB2Ny4zLXJjNCBhbmQgcmVwcm9kdWNlcyB0aGUgYnJhbmNo CnRyZWUuIE9uIEVWQjI0NywgdGhlIERlYmlhbi1wYWNrYWdlZCByYzQga2VybmVsIGJvb3RzIHZp YSBrZXhlYyB3aXRoIGl0cwptYXRjaGluZyBpbml0cmQgYW5kIG1vZHVsZXMuIFRoZSBTU0UgZnJh bWV3b3JrIGFuZCBwcmlvcml0eSB0ZXN0cywgYWxsIGZvdXIKc3RyZXNzIGxheWVycyBpbiBzdHJl c3M9MSwgYW5kIGJvdGggdXNlci1zdGFjayBzZWxmdGVzdHMgcGFzcy4gVGhlIGxhdHRlcgppbmNs dWRlcyAzMiBjb25jdXJyZW50IHNhbXBsZXJzLiBObyBuZXcga2VybmVsIGVycm9ycyB3ZXJlIG9i c2VydmVkLgpVbmF2YWlsYWJsZSBpbmplY3Rpb24gZXZlbnRzIHdlcmUgc2tpcHBlZCBieSB0aGUg ZnJhbWV3b3JrIHRlc3Q7IEtWTSB3YXMKZGlzYWJsZWQgaW4gdGhpcyB0ZXN0IGNvbmZpZ3VyYXRp b24sIHNvIHZpcnR1YWxpemF0aW9uIHdhcyBub3QgcmV0ZXN0ZWQuCgpUaGUgZnVuY3Rpb25hbCBy ZXN1bHRzIGJlbG93IGFyZSByZXRhaW5lZCBmcm9tIHRoZSBvcmlnaW5hbCB2MTAgYW5kIGFyZQpu b3QgY2xhaW1zIG9mIHJ1bnRpbWUgdmFsaWRhdGlvbiBvbiB0aGlzIHJlYmFzZWQga2VybmVsLgoK UklTQy1WIGRvZXMgbm90IGFyY2hpdGVjdHVyYWxseSBkZWZpbmUgYSBzdXBlcnZpc29yLW1vZGUg bm9uLW1hc2thYmxlCmludGVycnVwdCAoTk1JKS4gQW4gaW50ZXJydXB0IHRoYXQgYXJyaXZlcyB3 aGlsZSBMaW51eCBoYXMgY2xlYXJlZCBTSUUgc3RheXMKcGVuZGluZyBhbmQgaXMgbm90IG9ic2Vy dmVkIHVudGlsIGludGVycnVwdHMgYXJlIGVuYWJsZWQgYWdhaW4uIFRoYXQgaXMKY29ycmVjdCBm b3Igb3JkaW5hcnkgaW50ZXJydXB0IGhhbmRsaW5nLCBidXQgc29tZSBrZXJuZWwgd29yayBuZWVk cyBhbgpOTUktbGlrZSBub3RpZmljYXRpb24gdGhhdCBjYW4gcnVuIGV2ZW4gaW5zaWRlIGFuIGlu dGVycnVwdC1kaXNhYmxlZCByZWdpb246CnNhbXBsaW5nIGEgUE1VIG92ZXJmbG93IGF0IHRoZSBp bnN0cnVjdGlvbiB0aGF0IGNhdXNlZCBpdCwgb3IgdGFraW5nIGEKaGlnaC1wcmlvcml0eSBSQVMg cmVwb3J0IHByb21wdGx5LCBjYW5ub3Qgd2FpdCBmb3IgdGhlIG5leHQgdW5tYXNrIGJvdW5kYXJ5 LgoKVGhlIFNCSSBTdXBlcnZpc29yIFNvZnR3YXJlIEV2ZW50cyAoU1NFKSBleHRlbnNpb24gWzFd IGZpbGxzIHRoaXMgZ2FwLiBJdCBsZXRzCkxpbnV4IHJlZ2lzdGVyIGhhbmRsZXJzIGZvciBldmVu dHMgdGhhdCB0aGUgU0JJIGltcGxlbWVudGF0aW9uIGNhbiBkZWxpdmVyCmFoZWFkIG9mIG9yZGlu YXJ5IHRyYXBzIGFuZCBpbnRlcnJ1cHRzLCBnaXZpbmcgUklTQy1WIHRoZSBOTUktbGlrZSBzdXBl cnZpc29yCm5vdGlmaWNhdGlvbiBtZWNoYW5pc20gaXQgb3RoZXJ3aXNlIGxhY2tzLgoKU1NFIGNh biBjYXJyeSBzZXZlcmFsIGV2ZW50IHNvdXJjZXM6IGhpZ2gtcHJpb3JpdHkgUkFTIHJlcG9ydHMs IGRvdWJsZSB0cmFwcywKYW5kIFBNVSBvdmVyZmxvdywgd2l0aCByb29tIGZvciBmdXJ0aGVyIHN0 YW5kYXJkIGFuZCBwbGF0Zm9ybSBldmVudHMuIFRoaXMKc2VyaWVzIGZvY3VzZXMgb24gUE1VIG92 ZXJmbG93LCBpdHMgZmlyc3QgdXNlci4gRGVsaXZlcmluZyBvdmVyZmxvd3MgdGhyb3VnaApTU0Ug bGV0cyBwZXJmIHNhbXBsZSB0aGUgY29kZSB0aGF0IHdhcyBhY3R1YWxseSBydW5uaW5nIHdoaWxl IGludGVycnVwdHMgd2VyZQpkaXNhYmxlZCwgcmF0aGVyIHRoYW4gdGhlIGxhdGVyIHBvaW50IHdo ZXJlIGV4ZWN1dGlvbiByZWFjaGVkIGFuCmludGVycnVwdC11bm1hc2sgYm91bmRhcnkuCgpUaGlz IHNlcmllcyBpbXBsZW1lbnRzIHRoZSBMaW51eCBzaWRlIG9mIHRoYXQgaW50ZXJmYWNlOiB0aGUg YXJjaGl0ZWN0dXJlCmVudHJ5IG1hY2hpbmVyeSwgYSBmaXJtd2FyZSBkcml2ZXIgdGhhdCBleHBv c2VzIFNTRSBldmVudHMgdG8gaW4ta2VybmVsCmNsaWVudHMsIFBNVSBvdmVyZmxvdyBkZWxpdmVy eSwgYW5kIHJlZ3Jlc3Npb24gdGVzdHMuIFBlci1oYXJ0IGxvY2FsIGV2ZW50cwphbmQgc3lzdGVt LXdpZGUgZ2xvYmFsIGV2ZW50cyBzaGFyZSBvbmUgY2xpZW50IEFQSS4KClNTRSBkZWxpdmVyeSBt b2RlbAo9PT09PT09PT09PT09PT09PT0KCkxpbnV4IGZpcnN0IHJlZ2lzdGVycyBhIGhhbmRsZXIg YW5kIGFuIGV2ZW50IHN0YWNrIHdpdGggdGhlIFNCSQppbXBsZW1lbnRhdGlvbiwgdGhlbiBlbmFi bGVzIHRoZSBldmVudC4gV2hlbiBhbiBldmVudCBzb3VyY2UgaXMgc2lnbmFsbGVkLCB0aGUKTS1t b2RlIFNCSSBpbXBsZW1lbnRhdGlvbiBwcmVlbXB0cyBMaW51eCBldmVuIGluIGFuIGludGVycnVw dC1kaXNhYmxlZCByZWdpb246Cml0IHNhdmVzIHRoZSBpbnRlcnJ1cHRlZCBzdXBlcnZpc29yIHN0 YXRlIGFuZCBjb25zdHJ1Y3RzIGFuIFMtbW9kZSBjb250ZXh0CnRoYXQgZW50ZXJzIHRoZSByZWdp c3RlcmVkIGhhbmRsZXIuIExpbnV4IGNhbiBub3cgcnVuIGl0cyBvd24gaGFuZGxlciwgZm9yCmV4 YW1wbGUgdG8gdGFrZSBhIHBlcmYgc2FtcGxlIG9yIHByb2Nlc3MgYSBSQVMgcmVwb3J0LCB0aGVu IGNvbXBsZXRlcyB0aGUKZXZlbnQgd2l0aCBhbm90aGVyIFNCSSBjYWxsLCBhbGxvd2luZyB0aGUg aW50ZXJydXB0ZWQgY29udGV4dCB0byByZXN1bWUuCgpUaGUgdHlwaWNhbCBoYXJkd2FyZS10cmln Z2VyZWQgZGVsaXZlcnkgZmxvdyBpcyAoc29mdHdhcmUtaW5qZWN0ZWQgZXZlbnRzIHNraXAKdGhl IGhhcmR3YXJlIHRyaWdnZXIpOgoKICAgICAgIDwtLS0tLS0tLS0gTGludXgga2VybmVsIC0tLS0t LS0tLS0tPiAgPC0tIEZpcm13YXJlIC0tLT4gIDwtIEhhcmR3YXJlIC0+CiAgICAgaW50ZXJydXB0 ZWQgY29udGV4dCAgU1NFIGhhbmRsZXIgICAgICAgICAgICAgT3BlblNCSSAgICAgICAgICBIYXJk d2FyZQogICAgICAgICAgICAgIHwgICAgICAgICAgICAgICAgIHwgICAgICAgICAgICAgICAgICAg IHwgICAgICAgICAgICAgICAgIHwKWzFdIHNldHVwICAgICB8ICAgICAgICAgICAgICAgICB8LXJl Z2lzdGVyICYgZW5hYmxlLS0+ICAgICAgICAgICAgICAgICB8CiAgICAgICAgICAgICAgfCAgICAg ICAgICAgICAgICAgfCAgICAgICAgICAgICAgICAgICAgfCAgICAgICAgICAgICAgICAgfApbMl0g dHJpZ2dlciAgIHwgICAgICAgICAgICAgICAgIHwgICAgICAgICAgICAgICAgICAgIDwtLS0tdHJp Z2dlci0tLS0tLXwKICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICB8ICAgICAgICAgICAg ICAgICAgICB8ICAgICAgICAgICAgICAgICB8ClszXSBzYXZlICAgICAgfCAgICAgICAgICAgICAg ICAgfCAgICAgICAgICAgICstLS0tLS0tLS0tLS0tLSsgICAgICAgICAgfAogICAgICAgICAgICAg IHwgICAgICAgICAgICAgICAgIHwgICAgICAgICAgICB8IGNvbnRleHQgc2F2ZSB8ICAgICAgICAg IHwKICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICB8ICAgICAgICAgICAgKy0tLS0tLS0t LS0tLS0tKyAgICAgICAgICB8CiAgICAgICAgICAgICAgfCAgICAgICAgICAgICAgICAgfCAgICAg ICAgICAgICAgICAgICAgfCAgICAgICAgICAgICAgICAgfApbNF0gaW5qZWN0ICAgIHwgICAgICAg ICAgICAgICAgIHwgICAgICAgICstLS0tLS0tLS0tLS0tLS0tLS0tLS0tLSsgICAgIHwKICAgICAg ICAgICAgICB8ICAgICAgICAgICAgICAgICB8ICAgICAgICB8IGhhbmRsZXIgY29udGV4dCBzZXR1 cCB8ICAgICB8CiAgICAgICAgICAgICAgfCAgICAgICAgICAgICAgICAgfCAgICAgICAgKy0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tKyAgICAgfAogICAgICAgICAgICAgIHwgICAgICAgICAgICAgICAg IDwtLS1pbmplY3QgKG1yZXQpIC0tLXwgICAgICAgICAgICAgICAgIHwKICAgICAgICAgICAgICB8 ICAgICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICB8 Cls1XSBoYW5kbGUgICAgfCAgICAgICAgKy0tLS0tLS0tLS0tLS0tLS0rICAgICAgICAgICAgfCAg ICAgICAgICAgICAgICAgfAogICAgICAgICAgICAgIHwgICAgICAgIHwgZXZlbnQgaGFuZGxpbmcg fCAgICAgICAgICAgIHwgICAgICAgICAgICAgICAgIHwKICAgICAgICAgICAgICB8ICAgICAgICAr LS0tLS0tLS0tLS0tLS0tLSsgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICB8CiAgICAgICAg ICAgICAgfCAgICAgICAgICAgICAgICAgfCAgICAgICAgICAgICAgICAgICAgfCAgICAgICAgICAg ICAgICAgfApbNl0gY29tcGxldGUgIHwgICAgICAgICAgICAgICAgIHwtLS0tLWNvbXBsZXRlLS0t LS0tLT4gICAgICAgICAgICAgICAgIHwKICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICB8 ICAgICAgICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICB8Cls3XSByZXN0b3JlICAgfCAg ICAgICAgICAgICAgICAgfCAgICAgICAgICAgKy0tLS0tLS0tLS0tLS0tLS0tKyAgICAgICAgfAog ICAgICAgICAgICAgIHwgICAgICAgICAgICAgICAgIHwgICAgICAgICAgIHwgY29udGV4dCByZXN0 b3JlIHwgICAgICAgIHwKICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICB8ICAgICAgICAg ICArLS0tLS0tLS0tLS0tLS0tLS0rICAgICAgICB8CiAgICAgICAgICAgICAgfCAgICAgICAgICAg ICAgICAgfCAgICAgICAgICAgICAgICAgICAgfCAgICAgICAgICAgICAgICAgfApbOF0gcmVzdW1l ICAgIDwtLS0tLS0tLS0tLS1yZXN1bWUgKG1yZXQpIC0tLS0tLS0tLS0tLXwgICAgICAgICAgICAg ICAgIHwKICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICAg ICB8ICAgICAgICAgICAgICAgICB8CgpUaGUgY29udGV4dCB1c2VkIHRvIGVudGVyIHRoZSBoYW5k bGVyIGV4aXN0cyBvbmx5IGZvciB0aGlzIGhhbmRvZmY7IGl0IGlzIG5vdAp0aGUgdGFzayBjb250 ZXh0IHRoYXQgdGhlIGV2ZW50IGludGVycnVwdGVkLiBUaGUgYXJjaGl0ZWN0dXJlIGVudHJ5IGNv ZGUgam9pbnMKdGhlIHR3byBzaWRlczogaXQgbW92ZXMgZXhlY3V0aW9uIG9udG8gdGhlIGV2ZW50 J3MgZGVkaWNhdGVkIHN0YWNrIGFuZCBzaGFkb3cKY2FsbCBzdGFjaywgZXN0YWJsaXNoZXMgdGhl IGN1cnJlbnQgdGFzaywgYW5kIHByZXNlbnRzIHRoZSBpbnRlcnJ1cHRlZApyZWdpc3RlcnMgdG8g dGhlIGNhbGxiYWNrIGFzIGEgbm9ybWFsIHB0X3JlZ3MuIENsaWVudHMgY2FuIHRoZXJlZm9yZSBv cGVyYXRlCm9uIHRoZSBvcmlnaW5hbCBpbnRlcnJ1cHRlZCBjb250ZXh0IHdpdGhvdXQgZGVwZW5k aW5nIG9uIHRoZSBmaXJtd2FyZSBlbnRyeQpkZXRhaWxzLgoKTGludXggaW1wbGVtZW50YXRpb24K PT09PT09PT09PT09PT09PT09PT0KCkFuIFNTRSBoYW5kbGVyIHJ1bnMgaW4gTk1JLWxpa2UgY29u dGV4dDogaXQgbXVzdCBub3Qgc2xlZXAsIG11c3Qgbm90IHRha2UgYQpwYWdlIGZhdWx0LCBhbmQg bWF5IGludGVycnVwdCBjb2RlIHRoYXQgaG9sZHMgYXJiaXRyYXJ5IGxvY2tzIG9yIGlzIHBhcnR3 YXkKdGhyb3VnaCBrZXJuZWwgZW50cnkuIFRoZSBpbXBsZW1lbnRhdGlvbiBpcyBzaGFwZWQgYnkg dGhvc2UgY29uc3RyYWludHMuCgpCZWNhdXNlIGl0IGlzIE5NSS1saWtlLCBhbiBTU0UgY2FuIGFy cml2ZSBhdCBhbnkgcG9pbnQgd2hlcmUgaW50ZXJydXB0cyBhcmUKZGlzYWJsZWQsIGluY2x1ZGlu ZyB3aGlsZSBMaW51eCBpcyBtaWR3YXkgdGhyb3VnaCBleGNlcHRpb24gZW50cnksIGEgdGFzawpz d2l0Y2gsIG9yIGEgS1ZNIGd1ZXN0IHRyYW5zaXRpb24sIHdoZXJlIHRoZSBub3JtYWwga2VybmVs IGVudHJ5IHN0YXRlIGlzIG9ubHkKcGFydGlhbGx5IGVzdGFibGlzaGVkLiBUaGUgU1NFIGVudHJ5 IHdyYXBwZXIgKHRoZSBhcmNoaXRlY3R1cmUgYXNzZW1ibHkgdGhhdApydW5zIGJlZm9yZSB0aGUg Y2xpZW50IGNhbGxiYWNrKSBjb3BlcyB3aXRoIHRoaXM6IGl0IHByZXNlcnZlcyBMaW51eC1vd25l ZApzdHZlYywgaHN0YXR1cywgYW5kIHRhc2sgc3RhY2sgbWV0YWRhdGEgYWNyb3NzIHRoZSBoYW5k bGVyIGFuZCBhbnkgbmVzdGVkCmV4Y2VwdGlvbiwgYW5kIGl0cyBlYXJsaWVzdCBpbnN0cnVjdGlv bnMsIHdoaWNoIHJ1biBiZWZvcmUgdGhlIGV2ZW50IHN0YWNrIGFuZApjdXJyZW50IHRhc2sgYXJl IHNldCB1cCwgYXJlIGtlcHQgb3V0c2lkZSBrcHJvYmUgaW5zdHJ1bWVudGF0aW9uLgoKVGhlIGNh bGxiYWNrIHJlY2VpdmVzIHRoZSBpbnRlcnJ1cHRlZCByZWdpc3RlcnMgYXMgYSBwdF9yZWdzIGFu ZCBpcyBhbGxvd2VkIHRvCmVkaXQgdGhlbS4gT24gUklTQy1WIGE2IGFuZCBhNyBjYXJyeSBTQkkg Y2FsbCBhcmd1bWVudHMgYW5kIHJlc3VsdHMsIHNvIGEKY2FsbGJhY2sgdGhhdCB3YW50cyB0byBp bmZsdWVuY2UgYW4gaW4tZmxpZ2h0IFNCSSBjYWxsIHRoZSBldmVudCBpbnRlcnJ1cHRlZAplZGl0 cyB0aGVtIHRoZXJlLiBUaGUgZW50cnkgd3JhcHBlciBjb3BpZXMganVzdCBhNiBhbmQgYTcgZnJv bSB0aGF0IHB0X3JlZ3MKYmFjayBpbnRvIHRoZSBjb250ZXh0IGhhbmRlZCB0byB0aGUgY29tcGxl dGlvbiBTQkkgY2FsbCwgc28gdGhlIGVkaXQgdGFrZXMKZWZmZWN0IHdoZW4gdGhlIGludGVycnVw dGVkIGNvZGUgcmVzdW1lczsgdGhlIHJlc3Qgb2YgdGhlIGludGVycnVwdGVkIHN0YXRlIGlzCnJl c3RvcmVkIGJ5IGZpcm13YXJlIGFuZCBsZWZ0IHVudG91Y2hlZC4KClRoZSBmaXJtd2FyZSBkcml2 ZXIgbWFwcyB0aGUgU0JJIGV2ZW50IHN0YXRlIG1hY2hpbmUgb250byBrZXJuZWwgcmVzb3VyY2UK b3duZXJzaGlwLiBBIGNhbGxiYWNrLCBzdGFjaywgYW5kIGF0dHJpYnV0ZSBidWZmZXIgc3RheSBh bGl2ZSB1bnRpbCBmaXJtd2FyZQpoYXMgcmVtb3ZlZCBldmVyeSByZWdpc3RyYXRpb24gdGhhdCBj YW4gcmVmZXIgdG8gdGhlbS4gRmFpbGVkIHBhcnRpYWwKb3BlcmF0aW9ucyByZW1haW4gdHJhY2tl ZCBmb3IgbGF0ZXIgY2xlYW51cCwgYW4gYWJvcnRlZCBDUFUtb2ZmbGluZSBvcGVyYXRpb24KcmVz dG9yZXMgdGhlIHJlcXVlc3RlZCBldmVudCBzdGF0ZSwgYW5kIHNodXRkb3duIGFuZCBrZXhlYyBt YXNrIFNTRSBiZWZvcmUKTGludXggc3RvcHMgc2VydmljaW5nIGhhbmRsZXJzLgoKUE1VIG92ZXJm bG93IGFuZCBwZXJmCj09PT09PT09PT09PT09PT09PT09PQoKVGhlIFJJU0MtViBTQkkgUE1VIGRy aXZlciBkZWxpdmVycyBvdmVyZmxvd3MgdGhyb3VnaCBvcmRpbmFyeSBpbnRlcnJ1cHRzIGJ5CmRl ZmF1bHQuIFdoZW4gZmlybXdhcmUgaW1wbGVtZW50cyBTU0UgYW5kIHRoZSBsb2NhbCBQTVUtb3Zl cmZsb3cgZXZlbnQsIHRoZQpkcml2ZXIgcm91dGVzIG92ZXJmbG93cyB0aHJvdWdoIFNTRSBpbnN0 ZWFkLiBUaGUgY2hvaWNlIGlzIG1hZGUgb25jZSBhdCBzZXR1cAphbmQgaXMgbm90IHN3aXRjaGVk IGF0IHJ1bnRpbWU7IGFuIG9wZXJhdGlvbmFsIGZhaWx1cmUgZGlzYWJsZXMgc2FtcGxpbmcKcmF0 aGVyIHRoYW4gcmlza2luZyB0d28gYWN0aXZlIHJvdXRlcyBmb3IgdGhlIHNhbWUgb3ZlcmZsb3cu CgpUaGlzIGNoYW5nZXMgd2hlcmUgcGVyZiBjYW4gb2JzZXJ2ZSBhbiBvdmVyZmxvdywgbm90IGhv dyBhcHBsaWNhdGlvbnMgdXNlCnBlcmYuIEEgbm9ybWFsIFBNVSBpbnRlcnJ1cHQgcmFpc2VkIHdo aWxlIFMtbW9kZSBpbnRlcnJ1cHRzIGFyZSBtYXNrZWQgaXMKaGFuZGxlZCBvbmx5IG9uY2UgdGhl eSBhcmUgZW5hYmxlZCBhZ2Fpbiwgc28gdGhlIHJlc3VsdGluZyBzYW1wbGUgb2Z0ZW4gcG9pbnRz CmF0IHRoZSB1bm1hc2sgYm91bmRhcnkgcmF0aGVyIHRoYW4gYXQgdGhlIGNvZGUgdGhhdCBjb25z dW1lZCB0aGUgY3ljbGVzLiBTU0UKY2FuIGVudGVyIExpbnV4IGF0IHRoZSBvcmlnaW5hbCBwb2lu dCBhbmQgcmVtb3ZlIHRoYXQgc291cmNlIG9mIHNhbXBsaW5nIGJpYXMuCk5vIG5ldyBwZXJmIG9w dGlvbiBvciBwZXJmLmRhdGEgZm9ybWF0IGlzIGludHJvZHVjZWQuCgpUaGUgZW50cnkgY29kZSBz dXBwbGllcyB0aGUgaW50ZXJydXB0ZWQgcHRfcmVncyBuZWVkZWQgZm9yIHJlZ2lzdGVyIHNhbXBs ZXMKYW5kIGZvciBrZXJuZWwgYW5kIHVzZXIgY2FsbGNoYWlucy4gRFdBUkYgY2FsbGNoYWlucyBh ZGRpdGlvbmFsbHkgcmVxdWlyZSBhCmNvcHkgb2YgdGhlIGludGVycnVwdGVkIHVzZXIgc3RhY2su IFNpbmNlIGFuIFNTRSBoYW5kbGVyIGNhbm5vdCB0YWtlIGEgbm9ybWFsCnBhZ2UgZmF1bHQsIHRo aXMgc2VyaWVzIHRha2VzIGEgdGVtcG9yYXJ5IHJlZmVyZW5jZSB0byB0aGUgcmVzaWRlbnQgdXNl ciBwYWdlcwp3aXRoIGZhc3Qtb25seSBHVVAsIGNvcGllcyB0aGVtIHRocm91Z2ggdGhlaXIga2Vy bmVsIG1hcHBpbmdzLCBhbmQgdHJ1bmNhdGVzCnRoZSBzYW1wbGUgYXQgdGhlIGZpcnN0IHBhZ2Ug dGhhdCBpcyBub3QgaW1tZWRpYXRlbHkgYXZhaWxhYmxlLiBUaGUgZXhpc3RpbmcKaW4tYXRvbWlj IGNvcHkgcmVtYWlucyB1bmNoYW5nZWQgb3V0c2lkZSBTU0UgY29udGV4dC4KClRoZSBQTVUgaW50 ZWdyYXRpb24gcmV0YWlucyBwZXJmJ3MgdGhyb3R0bGluZyBhbmQgc3RvcHBlZC1ldmVudCBzZW1h bnRpY3MuIEl0CnJlc3RhcnRzIG9ubHkgcnVubmFibGUgY291bnRlcnMgYW5kIG9yZGVycyB0aGUg Q1BVIHBvd2VyLW1hbmFnZW1lbnQgY2FsbGJhY2tzCnNvIHRoYXQgY291bnRlcnMgY2Fubm90IHJl c3VtZSBhZnRlciBhIGhhcnQgaGFzIGZhaWxlZCB0byByZXN0b3JlIGl0cyBTU0UKZGVsaXZlcnkg cGF0aC4KCkhhcmR3YXJlIHJlc3VsdHMKPT09PT09PT09PT09PT09PQoKV2UgbWVhc3VyZWQgdGhp cyBvbiBhIFJJU0MtViBzZXJ2ZXIgcGxhdGZvcm0uIFRoZSBzYW1lIGtlcm5lbCBzb3VyY2UKYW5k IHBlcmYgYmluYXJ5IHdlcmUgdXNlZCBmb3IgYm90aCByb3V0ZXM7IG9uZSBkZWxpdmVyZWQgUE1V IG92ZXJmbG93cyB0aHJvdWdoCm9yZGluYXJ5IGludGVycnVwdHMgYW5kIHRoZSBvdGhlciB0aHJv dWdoIFNTRS4gVGhlIHRhYmxlIHNob3dzIHRoZSBtZWFuIG9mCnRocmVlIHJ1bnMgb2YgdGhyZWUg bWlsbGlvbiBzaW5nbGUtQ1BVICJwZXJmIGJlbmNoIHNjaGVkIHBpcGUiIG9wZXJhdGlvbnMuIFRo ZQoib3BzL3MiIGNvbHVtbnMgYXJlIHdvcmtsb2FkIHRocm91Z2hwdXQgKGhpZ2hlciBpcyBiZXR0 ZXIsIHNvIHRoZXkgc2hvdyB0aGUKcHJvZmlsaW5nIG92ZXJoZWFkKTsgdGhlICJzYW1wbGVzL3Mi IGNvbHVtbnMgYXJlIHRoZSBzYW1wbGluZyByYXRlIHBlcmYKYWN0dWFsbHkgYWNoaWV2ZWQgYWdh aW5zdCB0aGUgcmVxdWVzdGVkIC1GIGZyZXF1ZW5jeToKCiAgcmF0ZSAgICAgICBJUlEgb3BzL3Mg ICBTU0Ugb3BzL3MgICBkZWx0YSAgIElSUSBzYW1wbGVzL3MgICBTU0Ugc2FtcGxlcy9zCiAgLUYg OTkgICAgICAgIDMzNyw3MDcgICAgIDMzOSw1NTUgICArMC41NSUgICAgICAgICAgICA5OC4wICAg ICAgICAgICAgOTguNgogIC1GIDk5OSAgICAgICAzMzgsMzUyICAgICAzMzgsMjg5ICAgLTAuMDIl ICAgICAgICAgICA5OTUuNyAgICAgICAgICAgOTk4LjAKICAtRiA1MDAwICAgICAgMzI5LDAwMiAg ICAgMzMzLDAzNCAgICsxLjIzJSAgICAgICAgICA1MDAxLjcgICAgICAgICAgNTAwMS42CgpUaGVy ZSB3ZXJlIG5vIGxvc3Qgc2FtcGxlcy4gQWNyb3NzIHRoZXNlIG5vcm1hbCBmcmVxdWVuY3kgc2V0 dGluZ3MsIGJvdGgKZGVsaXZlcnkgbW9kZXMgcmVhY2hlZCB0aGUgcmVxdWVzdGVkIHNhbXBsZSBy YXRlIGFuZCB3b3JrbG9hZCB0aHJvdWdocHV0CmRpZmZlcmVkIGJ5IG5vIG1vcmUgdGhhbiAxLjIz JS4KClRoZSAicGVyZiBiZW5jaCBzY2hlZCBwaXBlIiB3b3JrbG9hZCBhbHNvIHNob3dzIHdoeSB0 aGUgZGVsaXZlcnkgbWVjaGFuaXNtCm1hdHRlcnMgdG8gdGhlIHJlc3VsdGluZyBwcm9maWxlLiBP cmRpbmFyeSBQTVUgaW50ZXJydXB0cyBjYW5ub3QgZW50ZXIgYW4KaW50ZXJydXB0LWRpc2FibGVk IGtlcm5lbCBjcml0aWNhbCBzZWN0aW9uLiBPdmVyZmxvd3MgcmFpc2VkIHRoZXJlIHJlbWFpbgpw ZW5kaW5nIHVudGlsIGludGVycnVwdHMgYXJlIGVuYWJsZWQgYWdhaW4uIFNhbXBsZXMgY29uc2Vx dWVudGx5IGFjY3VtdWxhdGUKYXQgdGhlIGVuYWJsZSBib3VuZGFyeSByYXRoZXIgdGhhbiBhdCB0 aGUgY29kZSB0aGF0IGNvbnN1bWVkIHRoZSBjeWNsZXMuIEluCnRoZSBJUlEgcHJvZmlsZSwgZmlu aXNoX3Rhc2tfc3dpdGNoKCkgYW5kIF9yYXdfc3Bpbl91bmxvY2tfaXJxcmVzdG9yZSgpCnRoZXJl Zm9yZSBhY2NvdW50ZWQgZm9yIDU0Ljk5JSBvZiBhbGwgc2FtcGxlcy4KClNTRSBjYW4gZW50ZXIg TGludXggd2hpbGUgUy1tb2RlIGludGVycnVwdHMgYXJlIGRpc2FibGVkLiBUaGUgUE1VLVNTRQpw cm9maWxlIHRoZXJlZm9yZSBzYW1wbGVzIGluc2lkZSB0aG9zZSBjcml0aWNhbCBzZWN0aW9ucyBh bmQgZXhwb3NlcyB0aGUKc2NoZWR1bGVyLCBsb2NraW5nLCBhZGRyZXNzLXNwYWNlIHN3aXRjaGlu ZywgYW5kIHdha2UtdXAgcGF0aHMgZG9pbmcgdGhlCmFjdHVhbCB3b3JrLiBUaGUgbGVhZGluZyBl bnRyaWVzIGZyb20gdGhlIHR3byAtRiA5OTkgcmVwb3J0cyBzaG93IHRoZQpkaWZmZXJlbmNlLgoK V2l0aCBvcmRpbmFyeSBQTVUgaW50ZXJydXB0IGRlbGl2ZXJ5OgoKICBvdmVyaGVhZCAgIHN5bWJv bAogICAgMzYuNjMlICAgZmluaXNoX3Rhc2tfc3dpdGNoLmlzcmEuMAogICAgMTguMzYlICAgX3Jh d19zcGluX3VubG9ja19pcnFyZXN0b3JlCiAgICAgNy42NiUgICBfX2ludGVybmFsX3N5c2NhbGxf Y2FuY2VsCiAgICAgNy41NSUgICBkb190cmFwX2VjYWxsX3UKICAgICA0LjE5JSAgIG11dGV4X2xv Y2sKICAgICAzLjY0JSAgIG11dGV4X3VubG9jawogICAgIDMuMDYlICAgZXhpdF90b191c2VyX21v ZGVfbG9vcAoKV2l0aCBQTVUtU1NFIGRlbGl2ZXJ5OgoKICBvdmVyaGVhZCAgIHN5bWJvbAogICAg IDUuNDglICAgX19rcHJvYmVzX3RleHRfZW5kCiAgICAgNS4yOSUgICBfX3NjaGVkdWxlCiAgICAg NS4xMCUgICByZXRfZnJvbV9leGNlcHRpb24KICAgICA0LjcxJSAgIGRvX3Jhd19zcGluX2xvY2sK ICAgICA0LjAxJSAgIGRvX3RyYXBfZWNhbGxfdQogICAgIDMuOTklICAgbXV0ZXhfbG9jawogICAg IDMuNjYlICAgc3dpdGNoX21tCiAgICAgMy40MyUgICBtdXRleF91bmxvY2sKICAgICAzLjI5JSAg IGV4aXRfdG9fdXNlcl9tb2RlX2xvb3AKICAgICAzLjI4JSAgIHBzaV9ncm91cF9jaGFuZ2UKClRo ZSBvcmRpbmFyeSBpbnRlcnJ1cHQgcHJvZmlsZSBpcyBkb21pbmF0ZWQgYnkgdHdvIGludGVycnVw dC1lbmFibGUKYm91bmRhcmllcy4gV2l0aCBTU0UsIHRob3NlIHR3byBlbnRyaWVzIGFjY291bnQg Zm9yIG9ubHkgMy4zNyUuIFRoZSBzYW1wbGVzCmFyZSBpbnN0ZWFkIGRpc3RyaWJ1dGVkIGFjcm9z cyBzY2hlZHVsZXIgcGF0aHMgd2l0aGluIHRoZSBjcml0aWNhbCBzZWN0aW9ucy4KCkF0IHBlcmYn cyBjb25maWd1cmVkIGxpbWl0IG9mIDEwMCwwMDAgc2FtcGxlcyBwZXIgc2Vjb25kLCBib3RoIHJv dXRlcyBzdGlsbAptYWRlIHByb2dyZXNzIHdpdGhvdXQgbG9zdCBzYW1wbGVzLiBJbiB0aGlzIGRl bGliZXJhdGVseSBzYXR1cmF0ZWQgcmVnaW1lIFNTRQpyZWR1Y2VkIHdvcmtsb2FkIHRocm91Z2hw dXQgYnkgMi43JSB0byA1LjglLCB3aGljaCBleHBvc2VzIHRoZSBhZGRpdGlvbmFsCmZpcm13YXJl LWVudHJ5IGNvc3QgYW5kIG1hcmtzIGEgcHJhY3RpY2FsIHVwcGVyIGJvdW5kYXJ5IGZvciBzYW1w bGluZy4KVGhpcnR5LXNlY29uZCBwZXJmIHRvcCBydW5zIGF0IHRoZSBzYW1lIHJhdGUgZWFjaCBw cm9jZXNzZWQgYWJvdXQgMy4xIG1pbGxpb24Kc2FtcGxlcyB3aXRoIG5vIGxvc3MsIHN0YWxscywg b3Iga2VybmVsIGZhaWx1cmVzLgoKVGhlIERXQVJGIGNhbGxjaGFpbiBwYXRoIGdldHMgZGVkaWNh dGVkIGNvdmVyYWdlIGJlY2F1c2UgaXQgd2FzIHRoZSBzb3VyY2Ugb2YKdGhlIGNvcnJ1cHRpb24g dGhpcyBzZXJpZXMgZml4ZXMuIE9uIHRoZSBzYW1lIHBsYXRmb3JtLAoicGVyZiByZWNvcmQgLWEg LWcgLS1jYWxsLWdyYXBoIGR3YXJmLDUxMiAtRiA5OTkiIGxheWVyZWQgb24gYSBjb25jdXJyZW50 CiJoYWNrYmVuY2ggLWcyNSAtbDYwMCIgLS0gdGhlIGNvbmZpZ3VyYXRpb24gdGhhdCBwcmV2aW91 c2x5IGNvcnJ1cHRlZApzcGlubG9ja3MgYW5kIG11dGV4ZXMgdW5kZXIgU1NFIC0tIG5vdyBjb21w bGV0ZXMgY2xlYW5seSwgd2l0aCBubyBsb3N0CnNhbXBsZXMsIGxvY2t1cHMsIFJDVSBzdGFsbHMs IG9yIGZhdWx0cywgaW5jbHVkaW5nIGEgNDMxLWl0ZXJhdGlvbiBzb2FrLgpQYXRjaCA5IGFkZHMg YSByZWdyZXNzaW9uIHRlc3QgdGhhdCBkcml2ZXMgdGhlIG5vbi1mYXVsdGluZyB1c2VyLXN0YWNr IGNvcHkKdGhyb3VnaCB0aGUgU1NFIGhhbmRsZXIgd2l0aCAzMiBjb25jdXJyZW50IHNhbXBsZXJz IGFuZCBjaGVja3MgcGVyZidzCnRydW5jYXRpb24gc2VtYW50aWNzLgoKQ2hhbmdlcyBpbiB0aGlz IHJlc2VuZAo9PT09PT09PT09PT09PT09PT09PT09CgpUaGlzIHJlc2VuZCBvbmx5IHJlYmFzZXMg djEwIG9udG8gdjcuMy1yYzQuIFRoZSBvbmx5IG1lcmdlIGNvbmZsaWN0IHdhcwppbiBwYXRjaCA3 LCBkdWUgdG8gdGhlIHVwc3RyZWFtIFBNVSBjb3VudGVyLW1hc2sgYml0bWFwIGNvbnZlcnNpb24u CkluIHYxMSwgSSB3aWxsIGFkZHJlc3MgdGhlIFNhc2hpa28gcmV2aWV3IGZlZWRiYWNrIGFuZCBp bXByb3ZlIHVzZXItc3RhY2sKY29weWluZyB3aXRoIGFuIE5NSS1zYWZlIGludGVyZmFjZSBzaW1p bGFyIHRvIHg4NidzIGNvcHlfZnJvbV91c2VyX25taSgpLgoKQ2hhbmdlcyBpbiB2MTAKPT09PT09 PT09PT09PT0KClYxMCB0dXJucyB0aGUgZWFybGllciBmZWF0dXJlIHNlcmllcyBpbnRvIGEgcGF0 aCBzdWl0YWJsZSBmb3Igc3VzdGFpbmVkIHBlcmYKdXNlLiBJbiBwYXJ0aWN1bGFyLCBpdDoKCiAg LSByZWNvbnN0cnVjdHMgYW5kIHB1Ymxpc2hlcyB0aGUgaW50ZXJydXB0ZWQgY29udGV4dCBmb3Ig cGVyZiByZWdpc3RlcgogICAgc2FtcGxlcyBhbmQga2VybmVsIGFuZCB1c2VyIGNhbGxjaGFpbnM7 CiAgLSBwcmVzZXJ2ZXMgY3VycmVudCwgdGFzayBzdGFjayBtZXRhZGF0YSwgc3R2ZWMsIGhzdGF0 dXMsIGFuZCBzaGFkb3ctY2FsbAogICAgc3RhY2sgc3RhdGUgYWNyb3NzIHN5bnRoZXRpYyBlbnRy eSBhbmQgbmVzdGVkIGV4Y2VwdGlvbnM7CiAgLSBwcmV2ZW50cyBmYXVsdC1kaXNhYmxlZCBhY2Nl c3NlcyBmcm9tIGVudGVyaW5nIHRoZSBnZW5lcmljIFJJU0MtViBwYWdlCiAgICBmYXVsdCBwYXRo IGFuZCBwcm92aWRlcyBhIG5vbi1mYXVsdGluZyBTU0UgdXNlci1zdGFjayBjb3B5OwogIC0gbWFr ZXMgZXZlbnQgbGlmZXRpbWUgYW5kIHJvbGxiYWNrIGV4cGxpY2l0IGFjcm9zcyBwYXJ0aWFsIGZp cm13YXJlCiAgICBvcGVyYXRpb25zLCBDUFUgaG90cGx1Zywgc2h1dGRvd24sIGNyYXNoLCBhbmQg a2V4ZWM7CiAgLSBjbG9zZXMgUE1VIHRocm90dGxlLCBjb3VudGVyIHJlc3RhcnQsIENQVSBwb3dl ci1tYW5hZ2VtZW50LCBhbmQgY2xlYW51cAogICAgcmFjZXMgd2l0aG91dCBhZGRpbmcgYSBydW50 aW1lIFNTRS10by1JUlEgdHJhbnNpdGlvbjsgYW5kCiAgLSBleHBhbmRzIHRoZSBmcmFtZXdvcmsg c3RyZXNzIGNvdmVyYWdlIGFuZCBhZGRzIGEgcmVncmVzc2lvbiB0ZXN0IGZvcgogICAgaGlnaC1m cmVxdWVuY3kgRFdBUkYgdXNlci1zdGFjayBzYW1wbGluZy4KCkNoYW5nZXMgaW4gdjk6CiAgLSBS ZWJhc2VkIHRoZSBvcmlnaW5hbCBzZXJpZXMgb250byBSSVNDLVYgZm9yLW5leHQuCiAgLSBQcmVz ZXJ2ZWQgTGludXgtb3duZWQgdHJhcCwgdmlydHVhbGl6YXRpb24sIGFuZCBzdXBlcnZpc29yIHN0 YXRlIGFjcm9zcwogICAgdGhlIHN5bnRoZXRpYyBTU0UgaGFuZGxlci4KICAtIEFkZGVkIGZyYW1l d29yayBzdHJlc3MgbW9kZXMgYW5kIHVwZGF0ZWQgTUFJTlRBSU5FUlMuCgpQcmV2aW91cyB2ZXJz aW9uczoKICB2OToKICAgIGh0dHBzOi8vbG9yZS5rZXJuZWwub3JnL3IvY292ZXIuMTc3ODMzMTg2 Mi5naXQuemhhbmd6aGFucGVuZy5qYXNwZXJAYnl0ZWRhbmNlLmNvbQogIHY4OgogICAgaHR0cHM6 Ly9sb3JlLmtlcm5lbC5vcmcvci8yMDI1MTEwNTA4MjYzOS4zNDI5NzMtMS1jbGVnZXJAcml2b3Np bmMuY29tCgpIb3cgdG8gdGVzdAo9PT09PT09PT09PQoKRW5hYmxlIHRoZSBTU0UgZnJhbWV3b3Jr IGFuZCBTU0Ugb3ZlcmZsb3cgZGVsaXZlcnk6CgogIENPTkZJR19SSVNDVl9TQklfU1NFPXkKICBD T05GSUdfUklTQ1ZfUE1VX1NCST15CiAgQ09ORklHX1JJU0NWX1BNVV9TQklfU1NFPXkKClBNVS1T U0UgYWxzbyByZXF1aXJlcyB0d28gT3BlblNCSSBmaXhlczoKCiAgZjMwYTU0ZjNiM2EwICgibGli OiBzYmk6IHBtdTogUmVtb3ZlIE1JUCBjbGVhcmluZyBmcm9tIHBtdV9zc2VfZW5hYmxlKCkiKQog ICAgWzJdLCBpbmNsdWRlZCBzaW5jZSBPcGVuU0JJIHYxLjcsCiAgICB3aGljaCBrZWVwcyBhbiBv dmVyZmxvdyBwZW5kaW5nIHdoaWxlIGl0cyBTU0UgZXZlbnQgaXMgdGVtcG9yYXJpbHkKICAgIGRp c2FibGVkOyBhbmQKICAzNTUxMWJjNmVlMWMgKCJsaWI6IHNiaTogc3NlOiBjbGVhciBTUFYgZm9y IG5vbi12aXJ0dWFsaXplZCBldmVudHMiKSBbM10sCiAgICBub3QgeWV0IGluY2x1ZGVkIGluIGEg dGFnZ2VkIHJlbGVhc2UsCiAgICB3aGljaCBzdG9wcyBhIHN0YWxlIEhTVEFUVVMuU1BWIGZyb20g YmVpbmcgYXBwbGllZCB0byBhIG5vbi12aXJ0dWFsaXplZAogICAgZXZlbnQuCgpCdWlsZCB0b29s cy90ZXN0aW5nL3NlbGZ0ZXN0cy9yaXNjdiwgdGhlbiBydW46CgogIGZvciBzdHJlc3MgaW4gMCAx IDI7IGRvCiAgICAgICAgICAuL3J1bl9zc2VfdGVzdC5zaCBzdHJlc3M9JHN0cmVzcyB8fCBicmVh awogIGRvbmUKICAuL3NzZV9wZXJmX3VzdGFjawoKVXNlZnVsIHBlcmYgcmVncmVzc2lvbiB3b3Jr bG9hZHMgaW5jbHVkZToKCiAgcGVyZiByZWNvcmQgLWUgY3ljbGVzIC1hIC0tIHNsZWVwIDEKICBw ZXJmIHRvcAogIHBlcmYgcmVjb3JkIC1nIC1GIDk5OSAtLSBoYWNrYmVuY2gKICBwZXJmIHJlY29y ZCAtLWNhbGwtZ3JhcGggZHdhcmYsODE5MiAtRiA5OTkgLS0gaGFja2JlbmNoCiAgcGVyZiByZWNv cmQgLWEgLUMgMyAtZSBjeWNsZXMgLUYgOTk5IC0tIFwKICAgICAgICAgIHRhc2tzZXQgLWMgMyBw ZXJmIGJlbmNoIHNjaGVkIHBpcGUgLWwgMzAwMDAwMAoKTGltaXRhdGlvbnMgYW5kIGZvbGxvdy11 cCB3b3JrCj09PT09PT09PT09PT09PT09PT09PT09PT09PT09PQoKVGhpcyBzZXJpZXMgZG9lcyBu b3QgeWV0IGRlbGl2ZXIgU1NFIGV2ZW50cyBpbnRvIGEgZ3Vlc3Qgb3IgdW53aW5kIGEgZ3Vlc3QK c3RhY2s7IGEgbGF0ZXIgS1ZNLVNTRSBzZXJpZXMgd2lsbCBsZXQgdGhlIGhvc3QgcmVjZWl2ZSBh biBldmVudCBmcm9tIGZpcm13YXJlCmFuZCBpbmplY3QgdGhlIGNvcnJlc3BvbmRpbmcgZXZlbnQg aW50byB0aGUgZ3Vlc3QuCgpIaWJlcm5hdGlvbiBhbmQgY3Jhc2gga2VybmVscyBhcmUgdW5zdXBw b3J0ZWQ6IHRoZSBjdXJyZW50IFNCSSBpbnRlcmZhY2UKY2Fubm90IHJlY29uc3RydWN0IGZpcm13 YXJlIHJlZ2lzdHJhdGlvbnMgYWZ0ZXIgYW4gaW1hZ2UgaXMgcmVzdG9yZWQsIGFuZCBhCmNyYXNo IGtlcm5lbCBjYW5ub3QgdGFrZSBvdmVyIHRoZSByZWdpc3RyYXRpb25zIGxlZnQgYnkgdGhlIGNy YXNoZWQga2VybmVsLCBzbwppdCBsZWF2ZXMgU1NFIG1hc2tlZC4KClsxXSBodHRwczovL2RvY3Mu cmlzY3Yub3JnL3JlZmVyZW5jZS9zYmkvZXh0LXNzZS5odG1sClsyXSBodHRwczovL2dpdGh1Yi5j b20vcmlzY3Ytc29mdHdhcmUtc3JjL29wZW5zYmkvY29tbWl0L2YzMGE1NGYzYjNhMDkxYzIyNWEw MDQ3NmY0MDM5YmYzOTliYWRkMWYKWzNdIGh0dHBzOi8vZ2l0aHViLmNvbS9yaXNjdi1zb2Z0d2Fy ZS1zcmMvb3BlbnNiaS9jb21taXQvMzU1MTFiYzZlZTFjOWMxN2I2YTg5YjQ0YzUyZTIwNDRiYjUx Yjk3OQoKQWNrbm93bGVkZ2VtZW50cwo9PT09PT09PT09PT09PT09CgpUaGUgb3JpZ2luYWwgZml2 ZSBmZWF0dXJlIHBhdGNoZXMgd2VyZSBkZXZlbG9wZWQgYnkgQ2zDqW1lbnQgTMOpZ2VyIGFuZApI aW1hbnNodSBDaGF1aGFuLiBUaGFua3MgdG8gU3VzaGVuZyBZYW5nIGZvciByZXBvcnRpbmcgdGhl IHBlcmYgY2FsbGNoYWluCmZhaWx1cmUgYW5kIGZvciBwcm92aWRpbmcgYSB3b3JrbG9hZCB0aGF0 IG1hZGUgaXQgcmVwcm9kdWNpYmxlLgoKU29ycnkgZm9yIGtlZXBpbmcgeW91IHdhaXRpbmcuIFNp bmNlIHY5IEkgc3BlbnQgYSBnb29kIGRlYWwgb2YgdGltZSBoYXJkZW5pbmcKdGhlIGxpZmVjeWNs ZSBhbmQgZXJyb3IgcGF0aHMgYW5kIHJlcHJvZHVjaW5nIGFuZCBhbmFseXNpbmcgdGhlIGJ1Z3Mg dGhhdCBvbmx5CnNob3cgdXAgaW4gdGhlIGNhbGxjaGFpbiBwYXRoLCB1bnRpbCB0aGUgc2VyaWVz IGZpbmFsbHkgcGFzc2VkIGJvdGggZnVuY3Rpb25hbAphbmQgc3VzdGFpbmVkIHN0cmVzcyB0ZXN0 aW5nIG9uIGhhcmR3YXJlLiBJIGFtIGNvbmZpZGVudCBpbiB2MTAsIGJ1dCwgZWNob2luZwpDbMOp bWVudCwgU1NFIGlzIGEgZ2VudWluZWx5IGNvbXBsZXggZmVhdHVyZTogaXQgYWRkcyBhIG5ldyBO TUktbGlrZSBlbnRyeSBwYXRoCmludG8gdGhlIGtlcm5lbCB0byBzdGFuZCBpbiBmb3IgYSBoYXJk d2FyZSBOTUkuIEkgd291bGQgdGhlcmVmb3JlIHdlbGNvbWUgd2lkZXIKY29tbXVuaXR5IHRlc3Rp bmcgYW5kIGZlZWRiYWNrLCBlc3BlY2lhbGx5IHVuZGVyIGhpZ2gtZnJlcXVlbmN5IGRlbGl2ZXJ5 IGFuZAptb3JlIGNvbXBsZXggaGFuZGxlcnMuCgotLS0KCkNsw6ltZW50IEzDqWdlciAoNSk6CiAg cmlzY3Y6IGFkZCBTQkkgU1NFIGV4dGVuc2lvbiBkZWZpbml0aW9ucwogIHJpc2N2OiBhZGQgc3Vw cG9ydCBmb3IgU0JJIFN1cGVydmlzb3IgU29mdHdhcmUgRXZlbnRzIGV4dGVuc2lvbgogIGRyaXZl cnM6IGZpcm13YXJlOiBhZGQgcmlzY3YgU1NFIHN1cHBvcnQKICBwZXJmOiBSSVNDLVY6IGFkZCBz dXBwb3J0IGZvciBTU0UgZXZlbnQKICBzZWxmdGVzdHMvcmlzY3Y6IGFkZCBTU0UgdGVzdCBtb2R1 bGUKClpoYW5wZW5nIFpoYW5nICg0KToKICByaXNjdjogc3NlOiBtYXNrIGV2ZW50cyBkdXJpbmcg c2h1dGRvd24gYW5kIGtleGVjCiAgcmlzY3Y6IG1tOiBhdm9pZCBlbmFibGluZyBpbnRlcnJ1cHRz IGZvciBub2ZhdWx0IHBhZ2UgZmF1bHRzCiAgcGVyZjogUklTQy1WOiBzdXBwb3J0IGNhbGxjaGFp bnMgd2l0aCBTU0UgZGVsaXZlcnkKICBzZWxmdGVzdHMvcmlzY3Y6IGFkZCBwZXJmIHVzZXItc3Rh Y2sgU1NFIGNvcHkgcmVncmVzc2lvbiB0ZXN0CgogRG9jdW1lbnRhdGlvbi9hcmNoL3Jpc2N2L2lu ZGV4LnJzdCAgICAgICAgICAgIHwgICAgMSArCiBEb2N1bWVudGF0aW9uL2FyY2gvcmlzY3YvcG11 LXNzZS5yc3QgICAgICAgICAgfCAgIDU1ICsKIE1BSU5UQUlORVJTICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICB8ICAgMjIgKwogYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9hc20uaCAg ICAgICAgICAgICAgICAgIHwgICAxNCArLQogYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9wZXJmX2V2 ZW50LmggICAgICAgICAgIHwgICAxMCArCiBhcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL3NiaS5oICAg ICAgICAgICAgICAgICAgfCAgIDYzICsKIGFyY2gvcmlzY3YvaW5jbHVkZS9hc20vc2NzLmggICAg ICAgICAgICAgICAgICB8ICAgIDcgKwogYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9zc2UuaCAgICAg ICAgICAgICAgICAgIHwgICA4MiArKwogYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS90aHJlYWRfaW5m by5oICAgICAgICAgIHwgICAgMSArCiBhcmNoL3Jpc2N2L2tlcm5lbC9NYWtlZmlsZSAgICAgICAg ICAgICAgICAgICAgfCAgICAxICsKIGFyY2gvcmlzY3Yva2VybmVsL2FzbS1vZmZzZXRzLmMgICAg ICAgICAgICAgICB8ICAgMTQgKwogYXJjaC9yaXNjdi9rZXJuZWwvZW50cnkuUyAgICAgICAgICAg ICAgICAgICAgIHwgICAxNCArCiBhcmNoL3Jpc2N2L2tlcm5lbC9tYWNoaW5lX2tleGVjLmMgICAg ICAgICAgICAgfCAgIDExICsKIGFyY2gvcmlzY3Yva2VybmVsL3BlcmZfY2FsbGNoYWluLmMgICAg ICAgICAgICB8ICAxNDIgKysKIGFyY2gvcmlzY3Yva2VybmVsL3Jlc2V0LmMgICAgICAgICAgICAg ICAgICAgICB8ICAgMTggKwogYXJjaC9yaXNjdi9rZXJuZWwvc2JpX3NzZS5jICAgICAgICAgICAg ICAgICAgIHwgIDI0NiArKysrCiBhcmNoL3Jpc2N2L2tlcm5lbC9zYmlfc3NlX2VudHJ5LlMgICAg ICAgICAgICAgfCAgMjI2ICsrKwogYXJjaC9yaXNjdi9rZXJuZWwvc21wLmMgICAgICAgICAgICAg ICAgICAgICAgIHwgICAxNyArCiBhcmNoL3Jpc2N2L21tL2ZhdWx0LmMgICAgICAgICAgICAgICAg ICAgICAgICAgfCAgIDExICstCiBkcml2ZXJzL2Zpcm13YXJlL0tjb25maWcgICAgICAgICAgICAg ICAgICAgICAgfCAgICAxICsKIGRyaXZlcnMvZmlybXdhcmUvTWFrZWZpbGUgICAgICAgICAgICAg ICAgICAgICB8ICAgIDEgKwogZHJpdmVycy9maXJtd2FyZS9yaXNjdi9LY29uZmlnICAgICAgICAg ICAgICAgIHwgICAxOCArCiBkcml2ZXJzL2Zpcm13YXJlL3Jpc2N2L01ha2VmaWxlICAgICAgICAg ICAgICAgfCAgICAzICsKIGRyaXZlcnMvZmlybXdhcmUvcmlzY3YvcmlzY3Zfc2JpX3NzZS5jICAg ICAgICB8IDEyMjggKysrKysrKysrKysrKysrKysKIGRyaXZlcnMvcGVyZi9LY29uZmlnICAgICAg ICAgICAgICAgICAgICAgICAgICB8ICAgMTEgKwogZHJpdmVycy9wZXJmL3Jpc2N2X3BtdS5jICAg ICAgICAgICAgICAgICAgICAgIHwgICAxNCArLQogZHJpdmVycy9wZXJmL3Jpc2N2X3BtdV9zYmku YyAgICAgICAgICAgICAgICAgIHwgIDU0MCArKysrKystLQogaW5jbHVkZS9saW51eC9jcHVob3Rw bHVnLmggICAgICAgICAgICAgICAgICAgIHwgICAgMSArCiBpbmNsdWRlL2xpbnV4L3BlcmYvcmlz Y3ZfcG11LmggICAgICAgICAgICAgICAgfCAgIDIwICstCiBpbmNsdWRlL2xpbnV4L3Jpc2N2X3Ni aV9zc2UuaCAgICAgICAgICAgICAgICAgfCAgIDk1ICsrCiB0b29scy90ZXN0aW5nL3NlbGZ0ZXN0 cy9yaXNjdi9NYWtlZmlsZSAgICAgICAgfCAgICAyICstCiB0b29scy90ZXN0aW5nL3NlbGZ0ZXN0 cy9yaXNjdi9zc2UvTWFrZWZpbGUgICAgfCAgIDEwICsKIC4uLi9zZWxmdGVzdHMvcmlzY3Yvc3Nl L21vZHVsZS9NYWtlZmlsZSAgICAgICB8ICAgMjIgKwogLi4uL3Jpc2N2L3NzZS9tb2R1bGUvcmlz Y3Zfc3NlX3Rlc3QuYyAgICAgICAgIHwgMTE1NCArKysrKysrKysrKysrKysrCiAuLi4vc2VsZnRl c3RzL3Jpc2N2L3NzZS9ydW5fc3NlX3Rlc3Quc2ggICAgICAgfCAgIDU5ICsKIC4uLi9zZWxmdGVz dHMvcmlzY3Yvc3NlL3NzZV9wZXJmX3VzdGFjay5jICAgICB8ICA1NjQgKysrKysrKysKIDM2IGZp bGVzIGNoYW5nZWQsIDQ1OTkgaW5zZXJ0aW9ucygrKSwgOTkgZGVsZXRpb25zKC0pCiBjcmVhdGUg bW9kZSAxMDA2NDQgRG9jdW1lbnRhdGlvbi9hcmNoL3Jpc2N2L3BtdS1zc2UucnN0CiBjcmVhdGUg bW9kZSAxMDA2NDQgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9zc2UuaAogY3JlYXRlIG1vZGUgMTAw NjQ0IGFyY2gvcmlzY3Yva2VybmVsL3NiaV9zc2UuYwogY3JlYXRlIG1vZGUgMTAwNjQ0IGFyY2gv cmlzY3Yva2VybmVsL3NiaV9zc2VfZW50cnkuUwogY3JlYXRlIG1vZGUgMTAwNjQ0IGRyaXZlcnMv ZmlybXdhcmUvcmlzY3YvS2NvbmZpZwogY3JlYXRlIG1vZGUgMTAwNjQ0IGRyaXZlcnMvZmlybXdh cmUvcmlzY3YvTWFrZWZpbGUKIGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL2Zpcm13YXJlL3Jp c2N2L3Jpc2N2X3NiaV9zc2UuYwogY3JlYXRlIG1vZGUgMTAwNjQ0IGluY2x1ZGUvbGludXgvcmlz Y3Zfc2JpX3NzZS5oCiBjcmVhdGUgbW9kZSAxMDA2NDQgdG9vbHMvdGVzdGluZy9zZWxmdGVzdHMv cmlzY3Yvc3NlL01ha2VmaWxlCiBjcmVhdGUgbW9kZSAxMDA2NDQgdG9vbHMvdGVzdGluZy9zZWxm dGVzdHMvcmlzY3Yvc3NlL21vZHVsZS9NYWtlZmlsZQogY3JlYXRlIG1vZGUgMTAwNjQ0IHRvb2xz L3Rlc3Rpbmcvc2VsZnRlc3RzL3Jpc2N2L3NzZS9tb2R1bGUvcmlzY3Zfc3NlX3Rlc3QuYwogY3Jl YXRlIG1vZGUgMTAwNjQ0IHRvb2xzL3Rlc3Rpbmcvc2VsZnRlc3RzL3Jpc2N2L3NzZS9ydW5fc3Nl X3Rlc3Quc2gKIGNyZWF0ZSBtb2RlIDEwMDY0NCB0b29scy90ZXN0aW5nL3NlbGZ0ZXN0cy9yaXNj di9zc2Uvc3NlX3BlcmZfdXN0YWNrLmMKCgpiYXNlLWNvbW1pdDogOTNmNTE1NzllN2RmMjQ4Nzgw MjE0MDk0NDE4ZjIwNTI1MzM4M2NjNQotLSAKMi41MC4xIChBcHBsZSBHaXQtMTU1KQoKX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtcmlzY3YgbWFp bGluZyBsaXN0CmxpbnV4LXJpc2N2QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmlu ZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1yaXNjdgo=