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dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.a=rsa-sha256 header.s=protonmail3 header.b=GO+iecbn Received: from mail-06.mail-europe.com (mail-06.mail-europe.com [85.9.210.45]) by smtp2.osuosl.org (Postfix) with ESMTPS id A6F3140585 for ; Fri, 2 Oct 2026 21:30:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1790976636; x=1791235836; bh=LJw7EsStORdqBy35TEYoiJjWRd9vSJ/AqNoeVd3yD+c=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=GO+iecbnnnRa4wghsnpcOEIICO+YO7CqpEjB2FtdiibCDUlonN8Ob1IAnT3Z0jk9Z g13c1R57JHbWDeSEhZZTWMQOp/JaJ2vQmJUCY0aGuXhYytZFIG53uoeMWB+7KZwfFr wE9tmYJIEk6mvCsibGAEgLdyiGKS6EDavamBvPgUKuJL+3ARRPT2MBvbhsBfaLnFjm 5h3B68NexECqFllVWkroRs3URx58i6b7nZxm3qE1L3d7L2yCPPYGt0comXMc36UEHT iEtnZCK2gW3aGlgP6JVdVWFNOnh85TJ2kBXYe+X8hOazd87D0V4SmWXqLms4AkM0sf uizixDqzaD4NA== Date: Fri, 02 Oct 2026 21:30:32 +0000 To: u-boot@lists.u-boot-project.org From: Dave Klotz Cc: Huan Zhou , Eric Chung , Neil Armstrong , Yixun Lan , Tom Rini , u-boot-spacemit@groups.io Subject: [PATCH 0/9] pci: spacemit: fixes for the K1 PCIe host driver Message-ID: Feedback-ID: 100562830:user:proton X-Pm-Message-ID: 4d02411929f2c87b4cf3cac8a1f757b105cb4058 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Mailman-Approved-At: Fri, 02 Oct 2026 21:30:59 +0000 X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Fixes for "pci: spacemit: add DesignWare PCIe host controller driver", following the Linux driver and the bring-up order that works on the boards I have: - power the slot from the root port's vpcie3v3-supply (the vendor k1x,pwr_on property is not in any upstream device tree); - keep the PHY interface in reset until LTSSM enable, and soft-reset the controller before bring-up so a warm reset starts clean; - check clock, reset and iATU setup errors; - report link up from the SMLH/RDLH bits in the link window; - leave the link speed alone unless max-link-speed is set, instead of writing Gen1 into LNKCAP and LNKCTL2, so the OS can still train the link at its full speed; - drop ASPM L1 from LNKCAP as Linux does for NVMe drives; - set the link width from num-lanes; - keep the probe successful when the link is down (an empty slot), and answer config cycles behind a down link with all ones. Tested on an OrangePi RV2: an NVMe drive on port B is found and FreeBSD boots from it by EFI; FreeBSD then retrains the link to x2 at 5 GT/s (with the Gen1 cap in place it could not). Port C, empty, reports "Link down" and nothing hangs. Under U-Boot this drive still trains x1 at 2.5 GT/s. Two observations about the RV2 device tree, not addressed here: pcie1_3_cfg and pcie2_4_cfg mux CLKREQ#, and with CLKREQ# muxed the controller gates its DBI clock whenever the endpoint leaves CLKREQ# high, so the next DBI access hangs; I run the board with PERST# only in those groups. And port B needs num-lanes =3D <2>, which the tree does not set. Dave Klotz (9): pci: spacemit: power the slot from vpcie3v3-supply pci: spacemit: hold the PHY interface in reset until link start pci: spacemit: soft reset the controller before bring-up pci: spacemit: check clock, reset and iATU setup results pci: spacemit: report link up from the link status register pci: spacemit: do not force the link to 2.5 GT/s pci: spacemit: do not advertise ASPM L1 pci: spacemit: set the link width from num-lanes pci: spacemit: do not fail the probe when the link is down drivers/pci/pcie_dw_spacemit.c | 231 +++++++++++++++++++++++---------- drivers/pci/pcie_dw_spacemit.h | 12 -- 2 files changed, 162 insertions(+), 81 deletions(-) base-commit: a000f2af240eaa996cec92f8d44bad96fdf3f898 --=20 2.55.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 768CBCA5FE4 for ; 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Fri, 2 Oct 2026 21:31:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1790976698; x=1791235898; bh=C88FtFcG1zvWKXucrQ3aMcqdZ08pgPQd70A8Lz6/+3Y=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=eICJSv+qqgh/Q4Sy+t9LI0ts8NzhUe8g7f6yEVFHmmKSsaW14yPpU/eWY05A1Vr5q PZJYCPAEogEgZuksmvgo+jlZlchYV9x4pg/fjqYkKK+HWeMi1mIsAxR3cAv0rnCOf6 EGk64x/AM/tL4FuvgpV6f9kNoF7+m9uCERHJr882DAofjN/9gmR4D1RM/8QBDm6dpb whYe2Q3o0IscUf/yC78tfmim14AnBHsp41IWlGNynSPDlT+alwBVxfzM8AJP8cYn33 +b/4GlU9h5z6X8yWhvH3Thrkycz811BFRu89/djtb0UwIaXp1I8P+uCIpGprEhjOHn f/KpQ0jhrEXsw== Date: Fri, 02 Oct 2026 21:31:33 +0000 To: u-boot@lists.u-boot-project.org From: Dave Klotz Cc: Huan Zhou , Eric Chung , Yixun Lan , Tom Rini , Guodong Xu , Raymond Mao , u-boot-spacemit@groups.io Subject: [PATCH 0/2] spacemit: k1: SPL robustness for boards without a PMIC or SPI NOR Message-ID: Feedback-ID: 100562830:user:proton X-Pm-Message-ID: abd65b509010326f8d71098ce06d2399c3ce960c MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Mailman-Approved-At: Fri, 02 Oct 2026 21:32:02 +0000 X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Message-ID: <20261002213133.GTPAJWy-qdnCacf-4wbD3uPXAWd8ZgASBkeU7uocbsw@z> Two small SPL changes for K1 boards that do not look like the BPI-F3 and MusePi Pro: 1. pmic_init() and nor_early_init() panic when the device tree gives the SPL no PMIC or no SPI controller. A board that boots from eMMC or microSD with its rails already up (the OrangePi R2S and RV2) stops there. Log it and carry on. 2. Provide board_boot_order(): the device the BootROM booted from, as detected now, then the other MMC controller and SPI NOR, so an unexpected BootROM path still finds U-Boot. Tested on an OrangePi RV2 booting from microSD (no SPI controller in the SPL): "No SPI controller", then the SPL loads U-Boot from the card through the detected MMC2. The fallback order was not exercised, since the detection was right. Dave Klotz (2): spacemit: k1: do not require a PMIC or an SPI controller in SPL spacemit: k1: fall back to the other boot devices in SPL board/spacemit/k1/spl.c | 48 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 44 insertions(+), 4 deletions(-) base-commit: a000f2af240eaa996cec92f8d44bad96fdf3f898 --=20 2.55.0