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From: SignKirigami <prcups@krgm.moe>
To: qemu-devel@nongnu.org
Cc: Bibo Mao <maobibo@loongson.cn>, SignKirigami <prcups@krgm.moe>
Subject: [PATCH v5 00/23] add LVZ support for TCG
Date: Fri,  9 Oct 2026 11:04:56 +0800	[thread overview]
Message-ID: <cover.1791514848.git.prcups@krgm.moe> (raw)

This patch implements Loongson VirtualiZation (LVZ) extension support
for LoongArch's TCG target. With this patch, it is now possible to start
a nested KVM-accelerated virtual machine on a TCG-emulated virtual machine.

SignKirigami (23):
  target/loongarch: select sys state by VM level
  target/loongarch: add get_sys() helper
  target/loongarch: add LVZ feature switcher
  target/loongarch: add LVZ CSR metadata
  target/loongarch: add vm level 1 definition
  target/loongarch: add definition about guest mmu_idx
  target/loongarch: add LVZ guest interrupt state
  target/loongarch: add LVZ guest timer
  target/loongarch: handle return to guest in ertn
  target/loongarch: handle LVZ exception and vm_exit
  target/loongarch: add host TLBRet and handle
  target/loongarch: add gid management functions
  target/loongarch: add LVZ parameters to TLB functions
  target/loongarch: add LVZ to TLB functions
  target/loongarch: add LVZ to invtlb
  target/loongarch: add LVZ to ptw
  target/loongarch: add LVZ migration state
  target/loongarch: add gcsr instructions and vm level 1 csr management
  target/loongarch: add LVZ CSRs
  target/loongarch: translate LVZ guest TLB instructions
  target/loongarch: translate LVZ guest traps and HVC
  target/loongarch: initialize CSR related to LVZ
  target/loongarch: exit to vm level 0 for fpd, sxd and asxd of vm level
    0

 target/loongarch/cpu-csr.h                    |  38 ++
 target/loongarch/cpu-mmu.h                    |  36 +-
 target/loongarch/cpu.c                        |  87 +++-
 target/loongarch/cpu.h                        | 105 ++++-
 target/loongarch/cpu_helper.c                 |  73 ++--
 target/loongarch/csr.c                        | 102 ++---
 target/loongarch/csr.h                        |   1 +
 target/loongarch/disas.c                      |  15 +
 target/loongarch/insns.decode                 |  14 +
 target/loongarch/internals.h                  |   4 +-
 target/loongarch/machine.c                    | 104 +++++
 target/loongarch/tcg/csr_helper.c             | 131 ++++--
 target/loongarch/tcg/helper.h                 |  49 ++-
 .../tcg/insn_trans/trans_extra.c.inc          |   5 +
 .../tcg/insn_trans/trans_privileged.c.inc     | 290 +++++++++++--
 target/loongarch/tcg/op_helper.c              |  37 ++
 target/loongarch/tcg/tcg_cpu.c                |  94 +++--
 target/loongarch/tcg/tcg_loongarch.h          |   3 +-
 target/loongarch/tcg/tlb_helper.c             | 395 ++++++++++++------
 target/loongarch/tcg/translate.c              |   3 +
 target/loongarch/translate.h                  |   1 +
 21 files changed, 1245 insertions(+), 342 deletions(-)

-- 
2.55.0



             reply	other threads:[~2026-10-09  3:06 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09  3:04 SignKirigami [this message]
2026-10-09  3:04 ` [PATCH v5 01/23] target/loongarch: select sys state by VM level SignKirigami
2026-10-10  3:21   ` Bibo Mao
2026-10-09  3:04 ` [PATCH v5 02/23] target/loongarch: add get_sys() helper SignKirigami
2026-10-10  3:21   ` Bibo Mao
2026-10-09  3:04 ` [PATCH v5 03/23] target/loongarch: add LVZ feature switcher SignKirigami
2026-10-10  3:20   ` Bibo Mao
2026-10-09  3:05 ` [PATCH v5 04/23] target/loongarch: add LVZ CSR metadata SignKirigami
2026-10-09  3:05 ` [PATCH v5 05/23] target/loongarch: add vm level 1 definition SignKirigami
2026-10-09  3:05 ` [PATCH v5 06/23] target/loongarch: add definition about guest mmu_idx SignKirigami
2026-10-10  3:36   ` Bibo Mao
2026-10-09  3:05 ` [PATCH v5 07/23] target/loongarch: add LVZ guest interrupt state SignKirigami
2026-10-10  4:03   ` Bibo Mao
2026-10-09  3:05 ` [PATCH v5 08/23] target/loongarch: add LVZ guest timer SignKirigami
2026-10-10  4:07   ` Bibo Mao
2026-10-09  3:05 ` [PATCH v5 09/23] target/loongarch: handle return to guest in ertn SignKirigami
2026-10-09  3:05 ` [PATCH v5 10/23] target/loongarch: handle LVZ exception and vm_exit SignKirigami
2026-10-09  3:05 ` [PATCH v5 11/23] target/loongarch: add host TLBRet and handle SignKirigami
2026-10-09  3:05 ` [PATCH v5 12/23] target/loongarch: add gid management functions SignKirigami
2026-10-10  9:00   ` Bibo Mao
2026-10-09  3:05 ` [PATCH v5 13/23] target/loongarch: add LVZ parameters to TLB functions SignKirigami
2026-10-09  3:05 ` [PATCH v5 14/23] target/loongarch: add LVZ " SignKirigami
2026-10-09  3:05 ` [PATCH v5 15/23] target/loongarch: add LVZ to invtlb SignKirigami
2026-10-09  3:05 ` [PATCH v5 16/23] target/loongarch: add LVZ to ptw SignKirigami
2026-10-09  3:05 ` [PATCH v5 17/23] target/loongarch: add LVZ migration state SignKirigami
2026-10-09  3:05 ` [PATCH v5 18/23] target/loongarch: add gcsr instructions and vm level 1 csr management SignKirigami
2026-10-09  3:05 ` [PATCH v5 19/23] target/loongarch: add LVZ CSRs SignKirigami
2026-10-09  3:05 ` [PATCH v5 20/23] target/loongarch: translate LVZ guest TLB instructions SignKirigami
2026-10-09  3:05 ` [PATCH v5 21/23] target/loongarch: translate LVZ guest traps and HVC SignKirigami
2026-10-09  3:05 ` [PATCH v5 22/23] target/loongarch: initialize CSR related to LVZ SignKirigami
2026-10-09  3:05 ` [PATCH v5 23/23] target/loongarch: exit to vm level 0 for fpd, sxd and asxd of vm level 0 SignKirigami

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