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From: Alison Schofield <alison.schofield@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
	Jonathan Cameron <jic23@kernel.org>,
	Dave Jiang <dave.jiang@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <iweiny@kernel.org>, Li Ming <ming.li@zohomail.com>,
	Richard Cheng <icheng@nvidia.com>,
	Robert Richter <rrichter@amd.com>
Cc: linux-cxl@vger.kernel.org
Subject: [PATCH v2 0/8] cxl/region: Refactor cxl_port_setup_targets()
Date: Sat, 10 Oct 2026 17:20:15 -0700	[thread overview]
Message-ID: <cover.1791676454.git.alison.schofield@intel.com> (raw)

Changes in v2:
- New patch 3 adds 'switch' to cxl_port_setup_targets() name (DaveJ)
- Add 'switch' to cxl_port_add_target() name (DaveJ)
- Pass the switch decoder to cxl_switch_port_add_target (DaveJ)
- Minor commit message updates based on function renamings
Link to v1: https://lore.kernel.org/linux-cxl/cover.1791575481.git.alison.schofield@intel.com/

Begin Cover Letter:
cxl_port_setup_targets() has grown to nearly 200 lines. It open codes each
step of adding an endpoint to a port's decoder: finding the distance
between peer positions, reading the parent interleave, calculating and
validating the port's interleave, setting up the decoder, and adding the
target.

This set is inspired by review feedback from Robert Richter on the series
that adds mixed-granularity region support [1]. That series needs to change
how this function calculates interleaves and Robert asked for that new code
to be moved into a helper. Rather than tidy only the new code, this set
splits up the whole function first.

Patches 1 and 2 prepare the code that moves. Both patches are suggestions
that Jonathan offered on the mixed gran series, and Patch 2 is actually
plucked from the mixed gran series where it sat as a prep patch.

Patch 3 renames the function to cxl_switch_port_setup_targets(), since it
configures switch decoder targets.

Patches 4-8 each move one step at a time into its own helper, which leaves
cxl_switch_port_setup_targets() at 58 lines.

The refactor patches make no functional changes and aims to be mechanical
and easy to review. I tried to avoid all 'while you're at it' changes
that would muddy the mechanical split.

That base commit is from cxl/next, as of this moment.

[1] https://lore.kernel.org/linux-cxl/cover.1788475206.git.alison.schofield@intel.com/


Alison Schofield (8):
  cxl: Add interleave encoding validity helpers
  cxl/region: Name the interleave locals in cxl_port_setup_targets()
  cxl/region: Rename cxl_port_setup_targets() to
    cxl_switch_port_setup_targets()
  cxl/region: Factor out cxl_port_peer_distance()
  cxl/region: Factor out cxl_port_parent_interleave()
  cxl/region: Factor out cxl_port_calc_interleave()
  cxl/region: Factor out cxl_port_setup_decoder()
  cxl/region: Factor out cxl_switch_port_add_target()

 drivers/cxl/core/region.c | 255 +++++++++++++++++++++++---------------
 drivers/cxl/cxl.h         |  21 ++++
 2 files changed, 178 insertions(+), 98 deletions(-)


base-commit: 71392a644e88c6bb921cdf12cb2b00adec070fe4
-- 
2.37.3


             reply	other threads:[~2026-10-11  0:20 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-11  0:20 Alison Schofield [this message]
2026-10-11  0:20 ` [PATCH v2 1/8] cxl: Add interleave encoding validity helpers Alison Schofield
2026-10-12 15:07   ` Jonathan Cameron
2026-10-11  0:20 ` [PATCH v2 2/8] cxl/region: Name the interleave locals in cxl_port_setup_targets() Alison Schofield
2026-10-12  3:01   ` Alison Schofield
2026-10-11  0:20 ` [PATCH v2 3/8] cxl/region: Rename cxl_port_setup_targets() to cxl_switch_port_setup_targets() Alison Schofield
2026-10-12 15:12   ` Jonathan Cameron
2026-10-13 16:45   ` Dave Jiang
2026-10-11  0:20 ` [PATCH v2 4/8] cxl/region: Factor out cxl_port_peer_distance() Alison Schofield
2026-10-12 15:16   ` Jonathan Cameron
2026-10-13  4:23     ` Alison Schofield
2026-10-11  0:20 ` [PATCH v2 5/8] cxl/region: Factor out cxl_port_parent_interleave() Alison Schofield
2026-10-11  0:20 ` [PATCH v2 6/8] cxl/region: Factor out cxl_port_calc_interleave() Alison Schofield
2026-10-11  0:20 ` [PATCH v2 7/8] cxl/region: Factor out cxl_port_setup_decoder() Alison Schofield
2026-10-11  0:20 ` [PATCH v2 8/8] cxl/region: Factor out cxl_switch_port_add_target() Alison Schofield

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