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From: Alison Schofield <alison.schofield@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
	Jonathan Cameron <jic23@kernel.org>,
	Dave Jiang <dave.jiang@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <iweiny@kernel.org>, Li Ming <ming.li@zohomail.com>,
	Richard Cheng <icheng@nvidia.com>
Cc: linux-cxl@vger.kernel.org
Subject: [PATCH v3 0/7] cxl/region: Refactor cxl_port_setup_targets()
Date: Mon, 12 Oct 2026 21:25:56 -0700	[thread overview]
Message-ID: <cover.1791860305.git.alison.schofield@intel.com> (raw)

This is a somewhat fast turnaround, and I probably caught Jonathan
midway through looking at v2. My reason (excuse) is that it's a foundation
for another set, so trying to keep it fresh.


Changes in v3:
- Drop patch "cxl/region: Name the interleave locals in cxl_port_setup_targets()".
- Move the distance comment above cxl_port_peer_distance() (Jonathan)
- Name the out-params out_iw/out_ig.
- Minor reverse fir and alignment cleanups
- Reorder the cxl_port_calc_interleave() declarations
v2: https://lore.kernel.org/linux-cxl/cover.1791676454.git.alison.schofield@intel.com/

Changes in v2:
- New patch 3 adds 'switch' to cxl_port_setup_targets() name (DaveJ)
- Add 'switch' to cxl_port_add_target() name (DaveJ)
- Pass the switch decoder to cxl_switch_port_add_target (DaveJ)
- Minor commit message updates based on function renamings
v1: https://lore.kernel.org/linux-cxl/cover.1791575481.git.alison.schofield@intel.com/

Begin Cover Letter:
cxl_port_setup_targets() has grown to nearly 200 lines. It open codes each
step of adding an endpoint to a port's decoder: finding the distance
between peer positions, reading the parent interleave, calculating and
validating the port's interleave, setting up the decoder, and adding the
target.

This set is inspired by review feedback from Robert Richter on the series
that adds mixed-granularity region support [1]. That series needs to change
how this function calculates interleaves and Robert asked for that new code
to be moved into a helper. Rather than tidy only the new code, this set
splits up the whole function first.

Patch 1 prepares the code that moves. It is a suggestion Jonathan offered
on the mixed gran series.

Patch 2 renames the function to cxl_switch_port_setup_targets(), since it
configures switch decoder targets.

Patches 3-7 each move one step at a time into its own helper, which leaves
cxl_switch_port_setup_targets() at 56 lines.

The refactor patches make no functional changes and aim to be mechanical
and easy to review. I tried to avoid all 'while you're at it' changes
that would muddy the mechanical split.

That base commit is from cxl/next.

[1] https://lore.kernel.org/linux-cxl/cover.1788475206.git.alison.schofield@intel.com/

Alison Schofield (7):
  cxl: Add interleave encoding validity helpers
  cxl/region: Rename cxl_port_setup_targets() to
    cxl_switch_port_setup_targets()
  cxl/region: Factor out cxl_port_peer_distance()
  cxl/region: Factor out cxl_port_parent_interleave()
  cxl/region: Factor out cxl_port_calc_interleave()
  cxl/region: Factor out cxl_port_setup_decoder()
  cxl/region: Factor out cxl_switch_port_add_target()

 drivers/cxl/core/region.c | 230 ++++++++++++++++++++++++--------------
 drivers/cxl/cxl.h         |  21 ++++
 2 files changed, 164 insertions(+), 87 deletions(-)


base-commit: 91320b84095afcaf9e4f676eef5b05346d60eb79
-- 
2.37.3


             reply	other threads:[~2026-10-13  4:26 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-13  4:25 Alison Schofield [this message]
2026-10-13  4:25 ` [PATCH v3 1/7] cxl: Add interleave encoding validity helpers Alison Schofield
2026-10-13  6:28   ` Li Ming
2026-10-13  4:25 ` [PATCH v3 2/7] cxl/region: Rename cxl_port_setup_targets() to cxl_switch_port_setup_targets() Alison Schofield
2026-10-13  6:29   ` Li Ming
2026-10-13  4:25 ` [PATCH v3 3/7] cxl/region: Factor out cxl_port_peer_distance() Alison Schofield
2026-10-13  6:30   ` Li Ming
2026-10-13  4:26 ` [PATCH v3 4/7] cxl/region: Factor out cxl_port_parent_interleave() Alison Schofield
2026-10-13  6:53   ` Li Ming
2026-10-13  4:26 ` [PATCH v3 5/7] cxl/region: Factor out cxl_port_calc_interleave() Alison Schofield
2026-10-13  6:54   ` Li Ming
2026-10-13  4:26 ` [PATCH v3 6/7] cxl/region: Factor out cxl_port_setup_decoder() Alison Schofield
2026-10-13  6:55   ` Li Ming
2026-10-13  4:26 ` [PATCH v3 7/7] cxl/region: Factor out cxl_switch_port_add_target() Alison Schofield
2026-10-13  6:53   ` Li Ming

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