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From: Binbin Zhou <zhoubinbin@loongson.cn>
To: Binbin Zhou <zhoubb.aaron@gmail.com>,
	Huacai Chen <chenhuacai@loongson.cn>,
	Yinbo Zhu <zhuyinbo@loongson.cn>, Mark Brown <broonie@kernel.org>
Cc: Huacai Chen <chenhuacai@kernel.org>,
	Xuerui Wang <kernel@xen0n.name>,
	loongarch@lists.linux.dev, linux-spi@vger.kernel.org,
	Binbin Zhou <zhoubinbin@loongson.cn>
Subject: [PATCH v2 0/7] spi: loongson: Fixes, cleanup and IRQ support
Date: Fri, 13 Nov 2026 13:42:21 +0800	[thread overview]
Message-ID: <cover.1794538736.git.zhoubinbin@loongson.cn> (raw)

Hi all:

This series fixes several long-standing bugs in the Loongson SPI
controller driver, cleans up register access, and adds interrupt-driven
transfers with a polling fallback.

Grouped as follows:

  Bug fixes (suitable for stable):
    1. Fix SPI mode caching so mode bits can be cleared.
    2. Drop the redundant and wrong CS deassert in setup(); the SPI core
       already drives the idle CS after ->setup().
    3. Separate PM register state from runtime state so set_clk() cannot
       corrupt the saved suspend state.
    4. Fix clock retrieval on ACPI platforms: try clk, fall back to
       "clock-frequency", fail probe if neither is valid, manage the
       clock over suspend/resume.
    5. Fix the clock divider calculation with an explicit table, avoid
       the off-by-one/out-of-bounds issue, propagate errors, and expose
       min/max speed to the SPI core.

  Cleanup:
    6. Use bitfield helpers and set/clear/update_bits() for register
       access. No functional change intended.

  New feature:
    7. Add interrupt mode support.

On a Loongson-2K3000 board, SPI flash reads improved from about 60 kB/s
in polling mode to about 950 kB/s with IRQ mode.

Thanks.
Binbin

===========
V2:
- Patch count reduced from 8 to 7;
- Deferred the private-definition move and regmap conversion from v1;
  instead, register access is cleaned up with bitfield helpers.
- Reworked the CS fix to drop the redundant and wrong deassert in
  setup(), since the SPI core drives the idle CS after ->setup().
- Reordered the clock fixes so the ACPI/clk-rate fix comes before the
  divider fix.
- Reworked IRQ support: fifo-depth/icnt handling, spinlock-protected
  transfer state, handle_err() cleanup, bounded message splitting, PCI
  IRQ vector allocation, platform optional IRQ with -EPROBE_DEFER, and
  polling fallback.

Link to V1:
https://lore.kernel.org/all/cover.1793689461.git.zhoubinbin@loongson.cn/

Binbin Zhou (7):
  spi: loongson: Fix incorrect SPI mode caching logic
  spi: loongson: Drop redundant CS deassert in setup()
  spi: loongson: Make suspend/resume registers PM-specific
  spi: loongson: Fix clock rate retrieval on ACPI platforms
  spi: loongson: Fix clock divider calculation with explicit table
  spi: loongson: Use bitfield helpers for register access
  spi: loongson: Add interrupt mode support

 drivers/spi/spi-loongson-core.c | 519 ++++++++++++++++++++++++++------
 drivers/spi/spi-loongson-pci.c  |  28 +-
 drivers/spi/spi-loongson-plat.c |  17 +-
 drivers/spi/spi-loongson.h      | 129 ++++++--
 4 files changed, 550 insertions(+), 143 deletions(-)


base-commit: c0ccde965b4874afea9bd40f8cc2362ab9910711
-- 
2.52.0


             reply	other threads:[~2026-11-13  5:42 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-13  5:42 Binbin Zhou [this message]
2026-11-13  5:42 ` [PATCH v2 1/7] spi: loongson: Fix incorrect SPI mode caching logic Binbin Zhou
2026-11-13  5:42 ` [PATCH v2 2/7] spi: loongson: Drop redundant CS deassert in setup() Binbin Zhou
2026-11-13  5:42 ` [PATCH v2 3/7] spi: loongson: Make suspend/resume registers PM-specific Binbin Zhou
2026-11-13  5:42 ` [PATCH v2 4/7] spi: loongson: Fix clock rate retrieval on ACPI platforms Binbin Zhou
2026-11-13  5:42 ` [PATCH v2 5/7] spi: loongson: Fix clock divider calculation with explicit table Binbin Zhou
2026-11-13  5:42 ` [PATCH v2 6/7] spi: loongson: Use bitfield helpers for register access Binbin Zhou
2026-11-13  5:42 ` [PATCH v2 7/7] spi: loongson: Add interrupt mode support Binbin Zhou

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