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From: Julien Grall <julien@xen.org>
To: Luca Fancellu <Luca.Fancellu@arm.com>,
	Ayan Kumar Halder <ayan.kumar.halder@amd.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Bertrand Marquis <Bertrand.Marquis@arm.com>,
	Michal Orzel <michal.orzel@amd.com>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
Subject: Re: [PATCH 2/5] xen/arm: mpu: Enclose access to MMU specific registers under CONFIG_MMU (arm32)
Date: Tue, 25 Feb 2025 16:24:01 +0000	[thread overview]
Message-ID: <d032a1fc-0ba7-4d6c-8731-dc829f469dfc@xen.org> (raw)
In-Reply-To: <0C7E90FC-B76E-4293-A716-1C74B1F89DA5@arm.com>

Hi,

On 06/02/2025 14:48, Luca Fancellu wrote:
>> On 4 Feb 2025, at 19:23, Ayan Kumar Halder <ayan.kumar.halder@amd.com> wrote:
>>
>> All the EL2 MMU specific registers in head.S are enclosed within CONFIG_MMU.
>>
>> Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com>
>> ---
>> xen/arch/arm/arm32/head.S | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
>> index 4ff5c220bc..1d0f84b18f 100644
>> --- a/xen/arch/arm/arm32/head.S
>> +++ b/xen/arch/arm/arm32/head.S
>> @@ -224,6 +224,7 @@ cpu_init_done:
>>          mcr   CP32(r0, HMAIR0)
>>          mcr   CP32(r1, HMAIR1)
>>
>> +#ifdef CONFIG_MMU
>>          /*
>>           * Set up the HTCR:
>>           * PT walks use Inner-Shareable accesses,
>> @@ -232,6 +233,7 @@ cpu_init_done:
>>           */
>>          mov_w r0, (TCR_RES1|TCR_SH0_IS|TCR_ORGN0_WBWA|TCR_IRGN0_WBWA|TCR_T0SZ(0))
>>          mcr   CP32(r0, HTCR)
>> +#endif
> 
> I was wondering if here it was better, for readability, to have this part defined in the arm32/mmu/head.S and
> arm32/mpu/head.S could have implemented a stub, maybe the maintainer could help with that.

The current logic is a bit odd because the MM specific registers are 
initialized in two different places (cpu_init and enable_mmu).

It would be better if we have a single place. So I would move setting 
HTCR (and event HMAIR{0,1} even if it means duplication) to enable_mmu.

The same would apply for arm64.

Cheers,

-- 
Julien Grall



  reply	other threads:[~2025-02-25 16:24 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-04 19:23 [PATCH 0/5] Enable early bootup of AArch32 MPU systems Ayan Kumar Halder
2025-02-04 19:23 ` [PATCH 1/5] xen/arm: mpu: Ensure that the page size is 4KB (arm32) Ayan Kumar Halder
2025-02-06 14:35   ` Luca Fancellu
2025-02-25 16:16   ` Julien Grall
2025-02-04 19:23 ` [PATCH 2/5] xen/arm: mpu: Enclose access to MMU specific registers under CONFIG_MMU (arm32) Ayan Kumar Halder
2025-02-06 14:48   ` Luca Fancellu
2025-02-25 16:24     ` Julien Grall [this message]
2025-02-04 19:23 ` [PATCH 3/5] xen/arm: mpu: Move some of the definitions to common file Ayan Kumar Halder
2025-02-06 15:01   ` Luca Fancellu
2025-02-25 22:08     ` Julien Grall
2025-02-26  8:28       ` Luca Fancellu
2025-02-28  9:22         ` Julien Grall
2025-02-28 10:34           ` Ayan Kumar Halder
2025-03-04 13:09             ` Luca Fancellu
2025-02-04 19:23 ` [PATCH 4/5] xen/arm: mpu: Create boot-time MPU protection regions (arm32) Ayan Kumar Halder
2025-02-06 15:29   ` Luca Fancellu
2025-02-06 17:34     ` Ayan Kumar Halder
2025-02-04 19:23 ` [PATCH 5/5] xen/arm: mpu: Implement a dummy enable_secondary_cpu_mm (arm32) Ayan Kumar Halder
2025-02-06 15:30   ` Luca Fancellu

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