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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.2 (3.50.2-1.fc39) MIME-Version: 1.0 On Wed, 2024-03-06 at 15:13 +0100, Jan Beulich wrote: > > +/* Generic IO read/write.=C2=A0 These perform native-endian accesses. > > */ > > +static inline void __raw_writeb(uint8_t val, volatile void __iomem > > *addr) > > +{ > > +=C2=A0=C2=A0=C2=A0 asm volatile ( "sb %0, 0(%1)" : : "r" (val), "r" (a= ddr) ); > > +} >=20 > I realize this is like Linux has it, but how is the compiler to know > that > *addr is being access here?=C2=A0 Assembler syntax told compiler that. 0(%1) - means that the memory location pointed to by the address in register %1. > If the omission of respective constraints here > and below is intentional, I think a comment (covering all instances) > is > needed. Note that while supposedly cloned from Arm code, Arm variants > do > have such constraints in Linux. >=20 It uses this constains only in arm32: #define __raw_writeb __raw_writeb static inline void __raw_writeb(u8 val, volatile void __iomem *addr) { asm volatile("strb %1, %0" : : "Qo" (*(volatile u8 __force *)addr), "r" (val)); } But in case of arm64: #define __raw_writeb __raw_writeb static __always_inline void __raw_writeb(u8 val, volatile void __iomem *addr) { asm volatile("strb %w0, [%1]" : : "rZ" (val), "r" (addr)); } And again looking at the defintion they use different option of strb instruction, and in case of strb they use [%1] which tells compiler that %1 is addressed which should be dereferenced. ~ Oleksii