From: Chris Wilson <chris@chris-wilson.co.uk>
To: Ben Widawsky <ben@bwidawsk.net>, Daniel Vetter <daniel@ffwll.ch>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: ioctl to query a bo's cache level
Date: Thu, 22 Sep 2011 16:49:12 +0100 [thread overview]
Message-ID: <d08817$1j2l3r@azsmga001.ch.intel.com> (raw)
In-Reply-To: <20110922153650.GA10332@cloud01>
On Thu, 22 Sep 2011 15:36:51 +0000, Ben Widawsky <ben@bwidawsk.net> wrote:
> On Thu, Sep 22, 2011 at 09:35:12AM +0200, Daniel Vetter wrote:
> > On Wed, Sep 21, 2011 at 06:47:10PM -0700, Ben Widawsky wrote:
> > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > > index a546a71..362da16 100644
> > > --- a/drivers/gpu/drm/i915/i915_gem.c
> > > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > > @@ -3777,6 +3777,29 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
> > > }
> > >
> > > int
> > > +i915_gem_get_cache_type_ioctl(struct drm_device *dev, void *data,
> > > + struct drm_file *file_priv)
> > > +{
> > > +
> > > + struct drm_i915_gem_get_cache_type *args = data;
> > > + struct drm_i915_gem_object *obj;
> > > + int ret = 0;
> > > +
> > > + obj = to_intel_bo(drm_gem_object_lookup(dev, file_priv, args->handle));
> > > + if (&obj->base == NULL) {
> > > + ret = -ENOENT;
> > > + goto out;
> > > + }
> > > +
> > > + args->cache_level = obj->cache_level;
> >
> > Grab struct_mutex around this, obj->cache_level might change over the
> > lifetime of the bo. Yeah, our locking is a mess, I know ;-)
>
> I don't see how a lock by itself helps. The cache_level could change as soon as
> you release the lock which results in the same problem.
Yes, you will always have the issue of coordination between processes,
but you do need the look around the unref, or use
drm_gem_object_unreference_unlocked(&obj->base);
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
next prev parent reply other threads:[~2011-09-22 15:51 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-20 4:25 [PATCH 1/6] RFCish: write only mappings (aka non-blocking) Ben Widawsky
2011-09-20 4:25 ` [PATCH 1/6] drm/i915: object CPU flush interface Ben Widawsky
2011-09-20 4:25 ` [PATCH 2/6] drm/i915: write only object tracking Ben Widawsky
2011-09-20 4:25 ` [PATCH 3/6] drm/i915: Support write only mappings Ben Widawsky
2011-09-20 5:29 ` Keith Packard
2011-09-20 5:37 ` Ben Widawsky
2011-09-20 8:30 ` Chris Wilson
2011-09-20 4:25 ` [PATCH 4/6] intel: write only map support Ben Widawsky
2011-09-20 4:25 ` [PATCH 5/6] write-only mappings Ben Widawsky
2011-09-20 4:25 ` [PATCH 6/6] intel: use write only maps for MapRangeBuffer Ben Widawsky
2011-09-20 11:06 ` [PATCH 1/6] RFCish: write only mappings (aka non-blocking) Daniel Vetter
2011-09-20 17:17 ` Eric Anholt
2011-09-20 19:19 ` Daniel Vetter
2011-09-21 8:19 ` [PATCH] intel: non-blocking mmaps on the cheap Daniel Vetter
2011-09-21 18:11 ` Eric Anholt
2011-09-21 19:19 ` Daniel Vetter
2011-09-22 1:47 ` [PATCH cont'd] " Ben Widawsky
2011-09-22 1:47 ` [PATCH] drm/i915: ioctl to query a bo's cache level Ben Widawsky
2011-09-22 7:35 ` Daniel Vetter
2011-09-22 15:36 ` Ben Widawsky
2011-09-22 15:49 ` Chris Wilson [this message]
2011-09-22 1:47 ` [PATCH] on top of daniel Ben Widawsky
2011-09-22 7:39 ` Daniel Vetter
2011-09-22 7:33 ` [PATCH cont'd] intel: non-blocking mmaps on the cheap Daniel Vetter
2011-09-20 21:16 ` [PATCH 1/6] RFCish: write only mappings (aka non-blocking) Chris Wilson
2011-09-21 7:02 ` Daniel Vetter
2011-09-20 22:19 ` Ben Widawsky
2011-09-21 7:07 ` Daniel Vetter
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