From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 1/2] drm/i915: properly lock gt_fifo_count Date: Sun, 06 Nov 2011 08:39:46 +0000 Message-ID: References: <1320539464-6201-1-git-send-email-daniel.vetter@ffwll.ch> <1320540095-1346-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id A77F09E7D2 for ; Sun, 6 Nov 2011 01:39:53 -0700 (PDT) In-Reply-To: <1320540095-1346-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org On Sun, 6 Nov 2011 01:41:35 +0100, Daniel Vetter wrote: > Use a combination of atomic_t and a spinlocked slow-path to make most > writes fast. What happened to the rule that this was protected by struct_mutex? Did you find a violation? Or is this step 1 in the hundred step plan to clarify and fix the locking around register access? -Chris -- Chris Wilson, Intel Open Source Technology Centre