From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 1/4] drm/i915: fixup interlaced vertical timings confusion Date: Thu, 26 Jan 2012 22:03:02 +0000 Message-ID: References: <1327611693-27294-1-git-send-email-daniel.vetter@ffwll.ch> <1327611693-27294-2-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B41B9E794 for ; Thu, 26 Jan 2012 14:03:17 -0800 (PST) In-Reply-To: <1327611693-27294-2-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Intel Graphics Development Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org On Thu, 26 Jan 2012 22:01:30 +0100, Daniel Vetter wrote: > - /* XXX some encoders set the crtcinfo, others don't. > - * Obviously we need some form of conflict resolution here... > - */ > - if (adjusted_mode->crtc_htotal == 0) > + /* gen2 needs vertical crtc timing information in fields because that's > + * what dvo outputs want - the chip itself can't do interlaced. All > + * later generations can do interlaced natively and want timings in > + * full frames. */ > + if (IS_GEN2(dev)) > + drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); > + else > drm_mode_set_crtcinfo(adjusted_mode, 0); > > diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c > index 6eda1b5..020a7d7 100644 > --- a/drivers/gpu/drm/i915/intel_dvo.c > +++ b/drivers/gpu/drm/i915/intel_dvo.c > @@ -157,7 +157,6 @@ static bool intel_dvo_mode_fixup(struct drm_encoder *encoder, > C(vsync_end); > C(vtotal); > C(clock); > - drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); > #undef C > } Removing drm_mode_set_crtcinfo() scares me because of the above comment. We need to make sure that the adjusted_mode is initialised along some path, and the fixup in intel_crtc_mode_fixup is just a hack. commit 897493504addc5609f04a2c4f73c37ab972c29b2 Author: Chris Wilson Date: Sun Sep 12 18:25:19 2010 +0100 drm/i915: Ensure that the crtcinfo is populated during mode_fixup() This should fix the mysterious mode setting failures reported during boot up and after resume, generally for i8xx class machines. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=16478 Reported-and-tested-by: Xavier Chantry Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29413 Tested-by: Daniel Vetter Signed-off-by: Chris Wilson Cc: stable@kernel.org If you can work out exactly where it should be initialised, you'll be my hero! -Chris -- Chris Wilson, Intel Open Source Technology Centre