From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 31/37] drm/i915: enable PCH earlier Date: Thu, 22 Mar 2012 11:05:22 +0000 Message-ID: References: <1332378612-3814-1-git-send-email-eugeni.dodonov@intel.com> <1332378612-3814-32-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id C01439EE9D for ; Thu, 22 Mar 2012 04:05:28 -0700 (PDT) In-Reply-To: <1332378612-3814-32-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org On Wed, 21 Mar 2012 22:10:06 -0300, Eugeni Dodonov wrote: > The modesetting sequence for PCH-related connections mentions that the > order of plane/pipe enablement could happen either before of after PCH > enablement. > > With LPT, however, we need to enable some things earlier to be able to > talk to PCH. So let's do it a bit in advance. Touching modesetting sequence is a nerve racking experience. Can we arrange to have this patch tested by itself, right now? -Chris -- Chris Wilson, Intel Open Source Technology Centre