From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support Date: Tue, 14 Jun 2011 19:22:33 +0100 Message-ID: References: <1308075188-2821-1-git-send-email-jbarnes@virtuousgeek.org> <1308075188-2821-2-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id EF169A0871 for ; Tue, 14 Jun 2011 11:22:36 -0700 (PDT) In-Reply-To: <1308075188-2821-2-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 14 Jun 2011 11:13:08 -0700, Jesse Barnes wrote: > Use the blit ring for submitting flips since the render ring doesn't > generate flip complete interrupts. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/intel_display.c | 25 +++++++++++++++++++++++++ > 1 files changed, 25 insertions(+), 0 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 06748f3a..3d095de 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6379,6 +6379,28 @@ out: > return ret; > } > > +static int intel_gen7_queue_flip(struct drm_device *dev, > + struct drm_crtc *crtc, > + struct drm_framebuffer *fb, > + struct drm_i915_gem_object *obj) > +{ > + struct drm_i915_private *dev_priv = dev->dev_private; > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_ring_buffer *ring = &dev_priv->ring[BCS]; > + int ret; > + > + ret = intel_ring_begin(&dev_priv->ring[BCS], 4); > + if (ret) > + goto out; > + > + intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17)); What's the magic number? 80 column limit? -Chris -- Chris Wilson, Intel Open Source Technology Centre